CS47L85 datasheet(136/370 Pages) CIRRUS

136 / 370 page

CS47L85

136

Rev 4.3

BIT

LABEL

DEFAULT

DESCRIPTION

15:0

DSPn_START_ADDRESS_

RDMA_BUFFER_0 [15:0]

0000h

DSPn RDMA Channel 0 Start

Address

base address +22h

DSPn_RDMA_Buffer_2

31:16

DSPn_START_ADDRESS_

RDMA_BUFFER_3 [15:0]

0000h

DSPn RDMA Channel 3 Start

Address

15:0

DSPn_START_ADDRESS_

RDMA_BUFFER_2 [15:0]

0000h

DSPn RDMA Channel 2 Start

Address

base address +24h

DSPn_RDMA_Buffer_3

31:16

DSPn_START_ADDRESS_

RDMA_BUFFER_5 [15:0]

0000h

DSPn RDMA Channel 5 Start

Address

15:0

DSPn_START_ADDRESS_

RDMA_BUFFER_4 [15:0]

0000h

DSPn RDMA Channel 4 Start

Address

base address +30h

DSPn_DMA_Config_1

23:16

DSPn_WDMA_CHANNEL_E

NABLE [7:0]

00h

DSPn WDMA Channel Enable

There are 8 WDMA channels; each

bit of this field enables the respective

WDMA channel.

Each bit is coded as:

0 = Disabled

1 = Enabled

13:0

DSPn_DMA_BUFFER_LEN

GTH [13:0]

0000h

DSPn DMA Buffer Length

Selects the amount of data

transferred in each DMA channel.

The LSB represents one 24-bit DSP

memory word.

base address +32h

DSPn_DMA_Config_2

7:0

DSPn_WDMA_CHANNEL_

OFFSET [7:0]

00h

DSPn WDMA Channel Offset

There are 8 WDMA channels; each

bit of this field offsets the Start

Address of the respective WDMA

channel.

Each bit is coded as:

0 = No offset

1 = Offset by 8000h

base address +34h

DSPn_DMA_Config_3

21:16

DSPn_RDMA_CHANNEL_O

FFSET [5:0]

00h

DSPn RDMA Channel Offset

There are 6 RDMA channels; each bit

of this field offsets the Start Address

of the respective RDMA channel.

Each bit is coded as:

0 = No offset

1 = Offset by 8000h

5:0

DSPn_RDMA_CHANNEL_E

NABLE [5:0]

00h

DSPn RDMA Channel Enable

There are 6 RDMA channels; each bit

of this field enables the respective

RDMA channel.

Each bit is coded as:

0 = Disabled

1 = Enabled

base address +36h

DSPn_DMA_Config_4

DSPn_DMA_WORD_SEL

DSPn Data Word Format

0 = Q3.20 format (4 integer bits, 20

fractional bits)

1 = Q0.23 format (1 integer bit, 23

fractional bits)

The data word format should be set

according to the requirements of

the applicable DSP firmware.

Table 28 DSP Direct Memory Access (DMA) Control

CS47L85 Datasheet(PDF) 136 Page - Cirrus Logic

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