CS48L32 datasheet(41/192 Pages) CIRRUS

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DS1219F4

Cirrus Logic

CS48L32

4.2 Input Signal Path

The auxiliary PDM interface control registers are described in Table 4-8.

Table 4-8. Auxiliary PDM Interface Control

Bit

Label

Default

Description

R4188 (0x105C)

AUXPDM_CTRL2

7:4

AUXPDM2_DOUT_

SRC[3:0]

0x0

Auxiliary PDM 2 data source

0x0 = Analog (mono, selected using AUXPDM2_SRC)

0x1 = Digital (stereo, from IN1_PDMDATA)

0x2 = Digital (stereo, from IN2_PDMDATA)

All other codes are reserved

3:0

AUXPDM1_DOUT_

SRC[3:0]

0x0

Auxiliary PDM 1 data source

0x0 = Analog (mono, selected using AUXPDM1_SRC)

0x1 = Digital (stereo, from IN1_PDMDATA)

0x2 = Digital (stereo, from IN2_PDMDATA)

All other codes are reserved

R16396 (0x400C)

INPUT_

CONTROL2

3:0

PDM_FLLCLK_

SRC[3:0]

0x0

PDM_CLK source select for FLL input reference

(Only valid if the respective interface is configured in Slave Mode)

0x8 = AUXPDM1_CLK

0x9 = AUXPDM2_CLK

All other codes are reserved

R17152 (0x4300)

AUXPDM_

CONTROL1

AUXPDM2_EN

Auxiliary PDM 2 enable

0 = Disabled

1 = Enabled

AUXPDM1_EN

Auxiliary PDM 1 enable

0 = Disabled

1 = Enabled

R17156 (0x4304)

AUXPDM_

CONTROL2

AUXPDM2_MUTE

Auxiliary PDM 2 mute

0 = Unmute

1 = Mute

AUXPDM1_MUTE

Auxiliary PDM 1 mute

0 = Unmute

1 = Mute

R17160 (0x4308)

AUXPDM1_

CONTROL1

17:16 AUXPDM1_FREQ[1:0]

Auxiliary PDM 1 CLK rate

00 = 3.072 MHz (2.8824 MHz)

01 = 2.048 MHz (1.8816 MHz)

10 = 1.536 MHz (1.4112 MHz)

11 = 768 kHz (705.6 kHz)

The frequencies in brackets apply for 44.1 kHz–related sample rates only (i.e.,

if SYSCLK_FRAC = 1). The Auxiliary PDM interface must be disabled when

updating this field.

11:8 AUXPDM1_SRC[3:0]

0x0

Auxiliary PDM 1 analog source

0x0 = IN1L

0x1 = IN1R

All other codes are reserved

Only valid if AUXPDM1_DOUT_SRC = 0x0. The Auxiliary PDM interface must

be disabled when updating this field.

AUXPDM1_TXEDGE

Auxiliary PDM 1 timing

0 = Output data is driven on rising edge of AUXPDM1_CLK

1 = Output data is driven on falling edge of AUXPDM1_CLK

The Auxiliary PDM interface must be disabled when updating this field.

AUXPDM1_MSTR

Auxiliary PDM 1 Master Mode select

0 = AUXPDM1_CLK Slave Mode (input)

1 = AUXPDM1_CLK Master mode (output)

The Auxiliary PDM interface must be disabled when updating this field.

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