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CS48L32 Datasheet(PDF) 36 Page - Cirrus Logic |
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CS48L32 Datasheet(HTML) 36 Page - Cirrus Logic |
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36 / 192 page ![]() 36 Cirrus Logic DS1219F4 CS48L32 4.2 Input Signal Path The ultrasonic detection and demodulation control registers are described in Table 4-7. Table 4-7. Ultrasonic Signal-Detect and Demodulation Control Register Address Bit Label Default Description R47104 (0xB800) US_CONTROL 9 US2_DET_EN 0 Ultrasonic Detect 2 Enable 0 = Disabled 1 = Enabled 8 US1_DET_EN 0 Ultrasonic Detect 1 Enable 0 = Disabled 1 = Enabled 1 US2_EN 0 Ultrasonic Demodulator 2 Enable 0 = Disabled 1 = Enabled 0 US1_EN 0 Ultrasonic Demodulator 1 Enable 0 = Disabled 1 = Enabled R47108 (0xB804) US1_CONTROL 13:12 US1_GAIN[1:0] 10 Ultrasonic Demodulator 1 Gain 00 = Disabled (no signal) 01 = –5 dB 10 = 1 dB 11 = 7 dB 11:8 US1_SRC[3:0] 0x0 Ultrasonic Demodulator 1 Source 0x0 = IN1L 0x1 = IN1R 0x2 = IN2L 0x3 = IN2R All other codes are reserved 6:4 US1_FREQ[2:0] 011 Ultrasonic Demodulator 1 Frequency 010 = 16–24 kHz 011 = 20–28 kHz All other codes are reserved |
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