CS48L32 datasheet(95/192 Pages) CIRRUS

95 / 192 page

DS1219F4

Cirrus Logic

CS48L32

4.5 DSP Peripheral Control

4.5.4.4

DSP GPIO Block Diagram and Control Registers

Figure 4-29. DSP GPIO Control

Input/output select

Output level control

Mask control

DSPGPn_SET2_LVL

DSPGPn_SET2_DIR

DSPGPn_SET2_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET3_LVL

DSPGPn_SET3_DIR

DSPGPn_SET3_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET4_LVL

DSPGPn_SET4_DIR

DSPGPn_SET4_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET1_LVL

DSPGPn_SET1_DIR

DSPGPn_SET1_MASK

DSP GPIO

readback

DSPGPn_STS

GPn_FN = 0x002

GPIO output

control

GPn_FN = 0x001

Pin-specific

function

GPn_FN = 0x000

Other GPIO

functions

GPIOn

GPn_FN > 0x002

Input/output select

Output level control

Mask control

DSPGPn_SET6_LVL

DSPGPn_SET6_DIR

DSPGPn_SET6_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET7_LVL

DSPGPn_SET7_DIR

DSPGPn_SET7_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET8_LVL

DSPGPn_SET8_DIR

DSPGPn_SET8_MASK

Input/output select

Output level control

Mask control

DSPGPn_SET5_LVL

DSPGPn_SET5_DIR

DSPGPn_SET5_MASK

These bits have no effect if GPn_FN = 0x000 or 0x002.

Valid for GPn_STS readback and GPIO IRQ event trigger only.

These bits have no effect if GPn_FN = 0x000 or 0x002.

If GPn_FN = 0x000, pin direction is set automatically .

If GPn_FN = 0x002, pin direction is set by DSPGPn _SETx_DIR.

GPIO input

readback

GPn_LVL p. 139

GPn_FN[9:0] p. 139

GPn_DB p. 139

GPn_DIR p. 139

GPn_PU p. 139

GPn_PD p. 139

GPn_POL p. 139

GPn_OP_CFG p. 139

GP1_STS p. 138

CS48L32 Datasheet(PDF) 95 Page - Cirrus Logic

CS48L32 Datasheet(HTML) 95 Page - Cirrus Logic

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