CS48L32 datasheet(31/192 Pages) CIRRUS

31 / 192 page

DS1219F4

Cirrus Logic

CS48L32

4.2 Input Signal Path

4.2.7

Input Signal Path Digital Volume Control

A digital volume control is provided on each input signal path, providing –64 dB to +31.5 dB gain control in 0.5 dB steps.

An independent mute control is also provided for each input signal path.

Updates to the digital-volume and mute functions are gated by the IN_VU bit: writing to the volume- or mute-control fields

does not become effective until a 1 is written to IN_VU. This makes it possible to apply changes to multiple signal paths

simultaneously.

Whenever the gain or mute setting is changed, the signal path gain is ramped up or down to the new settings at a

programmable rate. For increasing gain (or unmute), the rate is controlled by IN_VI_RAMP. For decreasing gain (or mute),

the rate is controlled by IN_VD_RAMP.

Note: The IN_VI_RAMP and IN_VD_RAMP fields should not be changed while a volume ramp is in progress.

Note that, although the digital-volume controls provide 0.5 dB steps, the internal circuits provide signal gain adjustment in

0.125 dB steps. This allows a very high degree of gain control and smooth volume ramping under all operating conditions.

R16424 (0x4028)

IN1L_CONTROL2

7:1 IN1L_PGA_

VOL[6:0]

0x40 Input Path 1 (Left) PGA Volume (applicable to analog input only)

0x00 to 0x3F = Reserved

0x40 = 0 dB

0x41 = 1 dB

0x42 = 2 dB

… (1 dB steps)

0x5F = 31 dB

0x60 to 0x7F = Reserved

Note: In Mid-Power Mode, a minimum gain of 6 dB is used. Volume selections of 5 dB

or less are overridden to 6 dB.

R16452 (0x4044)

IN1R_CONTROL1

29:28 IN1R_SRC[1:0]

Input Path 1 (Right) Source

00 = Differential (IN1RP_1–IN1RN_1)

01 = Single-ended (IN1RP_1)

10 = Differential (IN1RP_2–IN1RN_2)

11 = Single-ended (IN1RP_2)

IN1R_HPF

Input Path 1 (Right) HPF Enable

0 = Disabled

1 = Enabled

IN1R_LP_

MODE

Input Path 1 (Right) Low-Power Mode (applicable to analog input only)

0 = High Performance Mode

1 = Low Power Mode

R16456 (0x4048)

IN1R_CONTROL2

7:1 IN1R_PGA_

VOL[6:0]

0x40 Input Path 1 (Right) PGA Volume (applicable to analog input only)

0x00 to 0x3F = Reserved

0x40 = 0 dB

0x41 = 1 dB

0x42 = 2 dB

… (1 dB steps)

0x5F = 31 dB

0x60 to 0x7F = Reserved

Note: In Mid-Power Mode, a minimum gain of 6 dB is used. Volume selections of 5 dB

or less are overridden to 6 dB.

R16480 (0x4060)

INPUT2_

CONTROL1

18:16 IN2_OSR[2:0]

101

Input Path 2 Oversample Rate Control - selects the IN2_PDMCLK frequency.

000 = 384 kHz

001 = 768 kHz

010 = 1.536 MHz

011 = 2.048 MHz

100 = 2.4576 MHz

101 = 3.072 MHz

110 = 6.144 MHz

111 = Reserved

9:8 IN2_PDM_

SUP[1:0]

Input Path 2 PDM Reference Select

Sets the IN2_PDMDATA and IN2_PDMCLK logic levels

00 = VOUT_MIC

01 = MICBIAS1

All other codes are reserved

R16484 (0x4064)

IN2L_CONTROL1

IN2L_HPF

Input Path 2 (Left) HPF Enable

0 = Disabled

1 = Enabled

R16516 (0x4084)

IN2R_CONTROL1

IN2R_HPF

Input Path 2 (Right) HPF Enable

0 = Disabled

1 = Enabled

R16964 (0x4244)

INPUT_HPF_

CONTROL

2:0 IN_HPF_

CUT[2:0]

010

Input Path IN1–IN2 HPF select

Controls the cut-off frequency of the input path HPF circuits.

000 = 2.5 Hz

001 = 5 Hz

010 = 10 Hz

011 = 20 Hz

100 = 40 Hz

All other codes are reserved

Table 4-3. Input Signal Path Configuration (Cont.)

Bit

Label

Default

Description

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