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CS48L32 Datasheet(PDF) 10 Page - Cirrus Logic |
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CS48L32 Datasheet(HTML) 10 Page - Cirrus Logic |
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10 / 192 page  10 Cirrus Logic DS1219F4 CS48L32 3 Characteristics and Specifications Table 3-8. Input Path Characteristics Test conditions (unless specified otherwise): VDD_IO = VDD_CP = VDD_A = 1.8 V, VDD_D = VDD_FLL = 1.2 V, VOUT_MIC = 3.1 V (powered from internal LDO); TA = +25ºC; 1 kHz sinusoid signal; Fs = 48 kHz; PGA gain = 0 dB, 24-bit audio data. Parameter Min Typ Max Units Analog input paths (IN1xx) to ADC (Differential Input Mode) SNR (A-weighted), defined in Table 3-1 20 Hz to 20 kHz, 48 kHz sample rate 20 Hz to 8 kHz, 16 kHz sample rate 91 — 99 104 — — dB dB THD, defined in Table 3-1 –1 dBV input — –89 — dB THD+N, defined in Table 3-1 –1 dBV input — –88 –79 dB Channel separation (L/R), defined in Table 3-1 — 109 — dB Input-referred noise floor A-weighted, PGA gain = +20 dB — 2.6 — VRMS CMRR, defined in Table 3-1 PGA gain = +30 dB PGA gain = 0 dB — — 83 72 — — dB dB PSRR (VDD_IO, VDD_CP, VDD_A), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 91 81 — — dB dB PSRR (VDD_D, VDD_FLL), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 98 92 — — dB dB Analog input paths (IN1xx) to ADC (Single-Ended Input Mode) SNR (A-weighted), defined in Table 3-1 20 Hz to 20 kHz, 48 kHz sample rate 20 Hz to 8 kHz, 16 kHz sample rate 87 — 98 103 — — dB dB THD, defined in Table 3-1 –7dB V input — –84 — dB THD+N, defined in Table 3-1 –7dB V input — –83 –78 dB Channel separation (L/R), defined in Table 3-1 — 107 — dB Input-referred noise floor A-weighted, PGA gain = +20 dB — 4 — VRMS PSRR (VDD_IO, VDD_CP, VDD_A), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 77 52 — — dB dB PSRR (VDD_D, VDD_FLL), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 96 80 — — dB dB Analog input paths (IN1xx) to ADC (Differential Input, Mid-Power Mode) SNR, defined in Table 3-1 A-weighted 77 86 — dB THD, defined in Table 3-1 –7 dBV input — –81 — dB THD+N, defined in Table 3-1 –7 dBV input — –80 –74 dB Channel separation (L/R), defined in Table 3-1 —98— dB Input-referred noise floor A-weighted, PGA gain = +20 dB — 5.4 — VRMS CMRR, defined in Table 3-1 PGA gain = +30 dB PGA gain = 0 dB — — 83 68 — — dB dB PSRR (VDD_IO, VDD_CP, VDD_A), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 87 70 — — dB dB PSRR (VDD_D, VDD_FLL), defined in Table 3-1 100 mV (peak-peak) 217 Hz 100 mV (peak-peak) 10 kHz — — 96 73 — — dB dB |
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