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LTC7813 Datasheet(PDF) 8 Page - Analog Devices

Part # LTC7813
Description  70V Parallelable 4-Switch Buck-Boost Controller with Inductor DCR Current Sensing
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC7813 Datasheet(HTML) 8 Page - Analog Devices

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LTC7878
8
Rev. 0
For more information www.analog.com
PIN FUNCTIONS
BG1, BG2 (Pins 1, 8): Bottom Gate Driver Outputs. These
pins drive the gates of the bottom N-Channel MOSFETs
between PGND and DRVCC.
VIN (Pin 2): Main IC Supply. Power input to the internal
LDO connect to DRVCC. Bypass this pin to PGND with a
capacitor (0.1μF to 1μF) close to the pin.
DRVCC (Pin 3): Gate Driver Current Supply LDO Output.
The voltage on this pin is regulated to 7V from either VIN
or EXTVCC during normal operation. Bypass this pin to
PGND with a minimum of 4.7μF low ESR tantalum or
ceramic capacitor.
EXTVCC (PIN 4): External Power Input to an Internal LDO
Connected to DRVCC. When the voltage on this pin is
greater 8V and lower than the VIN pin voltage, this LDO
bypasses the internal LDO powered from VIN. Bypass
this pin to PGND with a capacitor (0.1μF to 1μF) close
to the pin.
INTVCC (PIN 5): Internal 5V Regulator Output. The control
circuits are powered from this voltage. Bypass this pin
to SGND with a minimum of 4.7µF low ESR tantalum or
ceramic capacitor.
RUN (Pin 6): Enable Control Input. A voltage above 1.22V
turns on the IC. There is a 2µA pull-up current on this pin.
Once the RUN pin rises above the 1.22V threshold, the
pull-up increases to 6µA.
PGND (PIN 7): Power Ground Pin. Connect this pin closely
to the sources of bottom N-channel MOSFETs and neg-
ative terminal of VIN, DRVCC, EXTVCC bypass capacitors.
TG2, TG1 (Pins 9, 32): Top Gate Driver Outputs. These are
the outputs of floating drivers with a voltage swing equal
to DRVCC superimposed on the switching nodes voltages.
BOOST2, BOOST1 (Pins 10, 31): Bootstrapped Supplies
to the Top Side Floating Drivers. Capacitors are connected
between the BOOST and SW pins and Schottky diodes
are tied between the BOOST and DRVCC pins. Voltage
swing at the BOOST1 pin is from DRVCC to (VIN + DRVCC).
Voltage swing at the BOOST2 pin is from DRVCC to
(VOUT + DRVCC).
SW2, SW1 (Pins 11, 30): Switch Node Connections.
Normally connect to the inductor terminals. SW1 swings
from a Schottky diode voltage drop below ground up
to VIN and SW2 swings from a Schottky diode voltage
drop below ground up to VOUT. A bootstrap capacitor
(0.1μF to 1μF) should be placed from each SW pin to the
corresponding BOOST pin as close as possible.
PGOOD (Pin 12): Power Good Inductor Output for the
Regulated Output Voltage. Open-drain logic out that is
pulled down to ground when the regulated output voltage
exceeds ±10% regulation window, after the internal 30µs
power bad mask timer expires.
SS (Pin 13): Soft-Start Input. The voltage ramp rate at
this pin sets the output voltage ramp rate of the regulated
voltage. A capacitor to ground accomplishes soft-start.
This pin has a 2.5µA pull-up current.
ITHB (Pin 14): Fast Transient Current Control Threshold.
Optional transient response improvement configure pin
based on the ITH pin voltage and operation mode. A resis-
tor from ITHB pin to ITH pin may improve the transient
response in buck mode. If no use, short ITHB pin and
ITH pin together. See Applications Information section for
details. Do not float this pin.
ITH (Pin 15): Current Control Threshold and Error
Amplifier Compensation Point. The current compara-
tor’s threshold varies with the ITH control voltage. The
Compensation network is from ITH pin to SGND.
VFB (Pin 16): Output Voltage Sensing Error Amplifier
Noninverting Input. This pin receives the remotely sensed
feedback voltage from external resistor divider across the
output voltage.
MODE/ILIM (Pin 17): FCM/Pulse-Skipping Mode and
Inductor Current Limit Program Pin. Tying this pin to
GND or INTVCC enables forced continuous mode oper-
ation, otherwise the controller works in the pulse-skip-
ping mode. Tying this pin to a voltage lower than half of
INTVCC enables the low current limit, higher than half of
INTVCC enables the high current limit. See Applications
Information section for details.



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