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PCA9420 Datasheet(PDF) 15 Page - NXP Semiconductors |
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PCA9420 Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 87 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications 8.11.1 Enable/disable and active discharge Enable/disable: Each rail can be enabled/disabled via I2C register setting independently in each mode setting. Active discharge: Additionally, there is an active discharge resistor on each rail, and the user can choose to enable/disable such feature through I2C register setting, so that when the output rail is disabled, it can quickly discharge the output voltage to ground. In addition, the active discharge is also enabled during voltage step down. This can be disabled by MTP bit. If the active discharge bleeding resistor is enabled AND there is a change of the Buck regulators' output voltage to a lower value (i.e. from 0.9 V to 0.75 V) there could be a small voltage peak of 5 % higher than the initial voltage (for 10 µs) during the transition. If this behavior is not desired, the bleeding resistor can be disabled (nEN_SW1_BLEED = 1 or nEN_SW2_BLEED = 1) but with the effect of a potentially longer transition to the new voltage of the buck regulator output 8.11.2 Power-good indication There is an output voltage comparator for each rail, comparing the actual output voltage against 90 % and 110 % of its target value; when the actual voltage is between 90 % and 110 % of its target value, the read-only related bits in I2C register, Regulator Status_1 (address: 20h) are updated accordingly to report the output voltage status (Power-good Indication). These comparators can be enabled/disabled by setting I2C register bit, PG_EN. A corresponding interrupt is triggered if unmasked. During steady state, only 90 % threshold is monitored. The power-good indication is shown as “not good”, and refreshes upon the completion of any of the following events: 1. During the power-up sequence stage 2. During power-down sequence stage 3. During the on-the-fly change of output voltage 8.11.3 Power-up/down sequence and on-the-fly voltage change Power-up sequence The device initiates the default power-up sequence in three different conditions. Condition 1) The device is off with no any power supply (No valid VIN and No battery with 2.7 V or above attached). In this condition, two signals below are able to start the default power-up sequence. • A valid VIN supply on VIN pin • A voltage on ASYS higher than ASYS_UVLO, a 2.8 V typical Condition 2) The device stays off by enabling SHIPMODE or in SHIP mode with a battery ≥ 2.8 V attached. In this condition, two signals are able to start the default power- up sequence. • A valid VIN supply on VIN pin • A falling edge on ON key over a 200 µs Condition 3) The device stays off by enabling PWR_DN_EN bit setting to 1 with a battery ≥ 2.8 V attached. In this condition, only one signal is able to start the default power-up sequence. PCA9420 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 4.0 — 28 November 2022 15 / 87 |
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