PCA9420 datasheet(56/87 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

9.5.38 Mode configuration mode setting 2_2 (MODECFG_2_2, address 2Ch)

This register contains mode setting 2, part 2 configuration register. This is a READ AND

WRITE register.

Bit

Symbol

Default value Type

Function

LDO1_ OUT_2

[3:0]

0100

R/W

LDO1 default output voltage for mode setting 2 (see below).

SW1_EN_2

R/W

SW1 Enable Control in mode setting 2

0: SW1 disabled

1: SW1 enabled

SW2_EN_2

R/W

SW2 Enable Control in mode setting 2

0: SW2 disabled

1: SW2 enabled

LDO1_EN_2

R/W

LDO1 Enable Control in mode setting 2

0: LDO1 disabled

1: LDO1 enabled

LDO2_EN_2

R/W

LDO2 Enable Control in mode setting 2

0: LDO2 disabled

1: LDO2 enabled

Table 64. MODECFG_2_2 register bit description

0000: 1.700 V

0011: 1.775 V

0110: 1.850 V

1001 to 1111:1.9 V

0001: 1.725 V

0100: 1.800 V

(default)

0111: 1.875 V

0010: 1.750 V

0101: 1.825 V

1000: 1.900 V

Table 65. LDO1 default output voltage for mode setting 2

9.5.39 Mode configuration mode setting 2_3 (MODECFG_2_3, address 2Dh)

This register contains mode setting 2, part 3 configuration register. This is a READ AND

WRITE register.

Bit

Symbol

Default value Type

Function

WD_TIMER_2

[1:0]

R/W

Watchdog timer setting in mode setting 2

00: Watchdog Timer Disabled

01: Watchdog Timer = 16 s

10: Watchdog Timer = 32 s

11: Watchdog Timer = 64 s

LDO2_OUT_2_

OFFSET

R/W

LDO2 output voltage offset selection in mode setting 2

0: LDO2 Output Voltage = LDO2_OUT_2_LSB[4:0] + 0 V

1: LDO2 Output Voltage = LDO2_OUT_2_LSB[4:0] + 1.2 V

Table 66. MODECFG_2_3 register bit description

PCA9420

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Product data sheet

Rev. 4.0 — 28 November 2022

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