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PCA9420 Datasheet(PDF) 34 Page - NXP Semiconductors

Part # PCA9420
Description  Power management IC for low-power microcontroller applications
PDF  87 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9420 Datasheet(HTML) 34 Page - NXP Semiconductors

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NXP Semiconductors
PCA9420
Power management IC for low-power microcontroller applications
Bit
Symbol
Default
value
Type
Function
7
6
ASYS_PREWARNING
[1:0]
10
R/W
ASYS Program a pre-warning voltage threshold on ASYS
00: 3.3 V
01: 3.4 V
10: 3.5 V
11: 3.6 V
5
4
ASYS_INPUT_SEL
[1:0]
00
R/W
ASYS input source selection
00: ASYS is powered by either VBAT or VIN (VIN has higher
priority over VBAT if both are presented but only when
VIN>VBAT)
01: ASYS is powered by VBAT only
10: ASYS is powered by VIN only
11: ASYS is disconnected to either VBAT or VIN (for internal
testing purpose only)
3
RSVD
1
R/W
Reserved bit
2
VIN_OVP_SEL
0
R/W
VIN over-voltage protection threshold (rising) selection
0: 5.50 V
1: 6.0 V
Note: The current default value for VIN_OVP_SEL is set
at 5.5 V, but it should be MTP programmable
1
0
VIN_UVLO_SEL
[1:0]
01
R/W
Program an under-voltage lockout threshold (falling) on VIN
00: 2.9 V
01: 3.1 V
10: 3.3 V
11: 3.5 V
Table 18. TOP_CNTL1 register bit description
9.5.11 Top level control_2 (TOP_CTL2, address 0Bh)
This register contains various configuration bits for top level related functions, part 2. This
is a READ AND WRITE register.
Bit
Symbol
Default value
Type
Function
7
6
ASYS_UVLO_SEL
[1:0]
11
R/W
Program a UVLO threshold on ASYS
00: 2.4 V
01: 2.5 V
10: 2.6 V
11: 2.7 V
5
RSVD
0
R/W
Reserved bit
Table 19. TOP_CNTL2 register bit description
PCA9420
All information provided in this document is subject to legal disclaimers.
© 2022 NXP B.V. All rights reserved.
Product data sheet
Rev. 4.0 — 28 November 2022
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