PCA9420 datasheet(12/87 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

EN_MODE_SEL_BY_PIN_x = 0: under current mode setting, mode setting switch is

controlled by internal I2C register bits MODE0_I2C and/or MODE1_I2C only; signal

applied on external MODESEL0/MODESEL1 pins is ignored.

EN_MODE_SEL_BY_PIN_x = 1: under current mode setting, mode setting switch is

controlled by signal applied on external MODESEL0 and/or MODESEL1 pins only, not by

internal I2C register bits MODE0_I2C and MODE1_I2C.

1. Mode setting switches back to Mode Setting A triggered by ON pin falling edge. Refer

to register description for “ON_CFG_x” bit for more details.

In the event of switching from one mode setting (initial mode setting) to another mode

setting (target mode setting):

1. If one output rail remains enabled in both initial mode setting and target mode setting

but with different output voltage in each setting, such voltage transition should

happen when the mode setting switch command (from either internal I2C setting or

external signal) is received;

2. If there are output rails which may be enabled or disabled from initial mode setting to

target mode setting, then always make sure these rails which change from disabled

to enabled take higher priority over rails which change from enabled to disabled, i.e.,

make sure all the rails change from disabled status to enabled status (reaches 90 %

of its target value) first, and then start to disable these rails, changing from enable

status to disable status.

8.7 Mode selection by external pins (MODESEL0, MODESEL1)

Up on initial power-up, PCA9420 enters its default setting (Mode Setting

0). While operating under Mode Setting 0, by default the I2C register bit,

EN_MODE_SEL_BY_PIN_0, is set to “0”, and the external signal applied on

the MODESEL0 and MODESEL1 pins are ignored. Only when the user sets

EN_MODE_SEL_BY_PIN_0 to “1”, can the mode control on the chip be programmed via

MODESEL0 and MODESEL1 pin signal settings. The MODESEL0 and MODESEL1 pins

are not allowed to change while a mode change is in progress.

When EN_MODE_SEL_BY_PIN_x (x=0, 1, 2, or 3) bits are set to "1", MCU should satisfy

the following MODESEL signal conditions:

• No less than 5 µs pulse on each MODESEL signal.

• No more than 0.5 µs delay between MODESEL pins when transit from different modes.

In order to avoid impacting mode transition when there is disturbance in MODESELS

pins (EN_MODE_SEL_BY_PIN_x =1), it is proposed to implement one of the following

designs:

• Hardware: Adding 10 nF capacitors to remove noise injection on MODESEL pins.

• Software: Send software reset command after wake up from ship mode to reset

MODESEL pins. (There is a register 0x71, accessible by I2C; SHIP_EXIT_DONE status

indicates device wake up from ship mode, refer to Table 76.)

MODESEL1 pin voltage level

MODESEL0 pin voltage level

All Settings from

LOW (0)

Mode Setting 0

LOW (0)

HIGH (1)

Mode Setting 1

HIGH (1)

LOW (0)

Mode Setting 2

Table 4. Mode selection by external pins (MODESEL0, MODESEL1)

PCA9420

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4.0 — 28 November 2022

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