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PCA9420 Datasheet(PDF) 3 Page - NXP Semiconductors |
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PCA9420 Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 87 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications 5 Simplified block diagram aaa-033067 Max 315mA Linear Charger OVP Detection (5.5V default or 6V over I2C) PCA9420 Main Control Blocks VIN ASYS VBAT 1-Cell Li-Ion Battery + (VBAT) - (GND) STEP-DOWN CONVERTER 1 250mA (0.5V-1.5V in 25mV steps & fixed 1.8V) STEP-DOWN CONVERTER 2 500mA (1.5V-2.1V in 25mV steps) (or 2.7V-3.3V in 25mV steps) PSYS1 EN 4.7µF/ 10V PGND1 LX1 ASYS 2.2µH SW1_OUT 50Ω PSYS2 PGND2 LX2 2.2µH SW2_OUT EN I2C I2C 1µF/ 10V 50Ω VDDCORE RT600 LDO1 1mA (1.7V-1.9V in 25mV steps) LDO2 250mA (1.5V-2.1V in 25mV steps) (or 2.7V-3.3V in 25mV steps) LDO1_OUT 50Ω LDO2_OUT 50Ω IN ASYS VBAT_BKUP IN ASYS VIN_ UVLO Thermal shutdown OFF ON Debounce Filter (200µs) On-Key 1MΩ + - 2.5V or VBAT Long-Key Debounce Filter (4s, 8s(default) ,12s,16s) 2.2µF/ 10V 2.9V,3.1V(default), 3.3V,3.5V 200mV ASYS_ Pre- warning + - 3.3V,3.4V, 3.5V (default),3.6V 100mV ASYS_ UVLO + - 100mV AGND1 AGND2 1µF/ 10V 10µF/ 6.3V 2.2µF/ 10V 10µF/ 6.3V VBAT 0.47µF/ 6.3V Coin battery ON Power-on from off or ship-mode 2.4V,2.5V, 2.6V, 2.7V (default) Recycle Power rails VBAT_ BKUP_ UVLO + - 1.9V 100mV Watchdog (disable, 16s, 32s, 64s) SCL SDA TS NTC NTC Control Block Up to 1MHz I2C Interface VDD_AO1V8 Option ADC MODE SELECTION MODESEL0 MODESEL1 AGND3 1µF/ 6.3V 2.2µF/ 6.3V 10nF 6.3V 10nF 6.3V Power-Good & Reset SYSRSTn Interrupts INTB R1 R1=R2=20kΩ to 220kΩ R2 PMIC_IRQN (VDD_AO1V8) + - 20°C TDIE Thermal Regulation (80°C to 115°C) ASYS 3-bit programmable (95°C to 125°C in 5°C steps) Thermal warning + - 20°C TDIE 2-bit programmable (75°C to 90°C in 5°C steps) 50µA 5µA 25-Bump WLCSP, 0.4mm pitch, 2.09mm x 2.09mm ASYS EN I2C EN I2C EN I2C SHIP MODE ENTER OR SHIP_EN_x=1 EXIT Valid VIN Valid VIN SHIP_WKUP_CFG=0 Battery absence detection EN I2C 1 2 A programmed ICHG_CC X Power-down sequence PWR_DN_EN=1 β selction 3-bit programmable From 3434k to 4750k Add 1.2V offset I2C Add 1.2V offset Default:1.0V Default:1.8V VDDIO_1,2,3, and/or 4 Always-on 1.8V Default: 3.3V Reverse Blocking Note: All directions for the arrows in the schematic are made from the PCA9420 perspective. Short on PCB i.MXRT* RT600 i.MXRT* VDD1V8 and other 1.8V power PMIC_I2C_SCL (VDDIO_1) PMIC_I2C_SDA (VDDIO_1) VDD_AO1V8 VDDIO_1,2,3, and/or 4 USB1_VDD3V3 and other 3V power RESETN (VDD_AO1V8) PMIC_MODE0 (VDD_AO1V8) PMIC_MODE1 (VDD_AO1V8) Option: can be remove if an internal pull-up R is available on i.MXRT* device VDDIO_1 MODESEL1 MODESEL0 EN_MODE_SEL_BY_PIN_x=1 Output Voltage Setting LOW (0) HIGH (1) LOW (0) LOW (0) HIGH (1) LOW (0) HIGH (1) HIGH (1) Mode Setting 0 Mode Setting 1 Mode Setting 2 Mode Setting 3 (x can be 0, 1, 2 or 3) Can be connected to any ADC Regulator Default (V)* Output Range BUCK1 1.0 (MTP) 0.5V to 1.5V and fixed 1.8V BUCK2 LDO1 LDO2 1.5V to 2.1V or 2.7V to 3.3V * : Regardless of mode setting 1.7V to 1.9V 1.5V to 2.1V or 2.7V to 3.3V Resolution 25mV Max Current 250mA 25mV 25mV 25mV 500mA 1mA 250mA Linear charger: 0mA to 315mA in 5mA steps for charge current Input Current Limit (typical): 85mA, 255mA, 425mA, 595mA, 765mA, 935mA, 1105mA, or disable 1.8 (MTP) 1.8 (MTP) 3.3 (MTP) If VIN is greater than 6V, the voltage rating on the capacitor of 2.2µF/10V shall be changed to a higher voltage than a maximum voltage in applications. VIN ≤ 6V Figure 1. Simplified block diagram PCA9420 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 4.0 — 28 November 2022 3 / 87 |
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