PCA9420 datasheet(52/87 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

Bit

Symbol

Default value Type

Function

ON_CFG_1

R/W

Mode configuration upon falling edge applied on “ON” pin in Mode

Setting B:

0: upon valid falling edge applied on “ON” pin, the device will switch

back to mode 0 setting (if the device is currently operating in mode 0

setting, then no mode switch)

1: upon valid falling edge applied on “ON” pin, no mode switch, the

device stays in its current mode setting operation

SW2_OUT_1_

OFFSET

R/W

SW2 output voltage offset selection in mode setting 1

0: SW2 Output Voltage = SW2_OUT_1_LSB[4:0] + 0 V

1: SW2 Output Voltage = SW2_OUT_1_LSB[4:0] + 1.2 V

SW2_OUT_1_

LSB

[4:0]

01100

R/W

SW2 default output voltage for mode setting 1 (see below).

Table 54. MODECFG_1_1 register bit description...continued

00000=1.500 V

01001=1.725 V

10010=1.950 V

00001=1.525 V

01010=1.750 V

10011=1.975 V

00010=1.550 V

01011=1.775 V

10100=2.000 V

00011=1.575 V

01100=1.800 V

(default)

10101=2.025 V

00100=1.600 V

01101=1.825 V

10110=2.050 V

00101=1.625 V

01110=1.850 V

10111=2.075 V

00110=1.650 V

01111=1.875 V

11000=2.100 V

00111=1.675 V

10000=1.900 V

11001-11111=2.1 V

01000=1.700 V

10001=1.925 V

Table 55. SW2 default output voltage for mode setting 1

9.5.34 Mode configuration mode setting 1_2 (MODECFG_1_2, address 28h)

This register contains mode setting 1, part 2 configuration register. This is a READ AND

WRITE register.

Bit

Symbol

Default value Type

Function

LDO1_ OUT_1

[3:0]

0100

R/W

LDO1 default output voltage for mode setting 1 (see below).

SW1_EN_1

R/W

SW1 Enable Control in mode setting 1:

0: SW1 disabled

1: SW1 enabled

Table 56. MODECFG_1_2 register bit description

PCA9420

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Product data sheet

Rev. 4.0 — 28 November 2022

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PCA9420 Datasheet(PDF) 52 Page - NXP Semiconductors

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