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PCA9420 Datasheet(PDF) 25 Page - NXP Semiconductors |
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PCA9420 Datasheet(HTML) 25 Page - NXP Semiconductors |
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25 / 87 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications 9.3 Register type There are four register types used on the device: • Read and Write (R/W) • Read Only (R) • Write Only (W) • Write and Clear (W/C) For Write and Clear (W/C), a write to a register with a bit-mask specifies which interrupts to clear. For example, if the status register shows 8’b0000_1001 as an interrupt status (i.e. interrupt [0] and interrupt [3] are both set), user may write 8’b0000_1000, meaning the intent is to only clear interrupt [3] (but interrupt [0] should NOT be “cleared”). If the intent is to clear both interrupts, then the user could write back 8’b0000_1001. 9.4 Register map Address (Hex) Register Name Description Type Reset Value (Binary) System Control Registers 00 Device Information, DEV_INFO Device ID, revision R 0000 0001 01 Top Level Interrupt Status, TOP_INT Top level interrupt event status R/C 0000 0000 02 Sub Level Interrupt_0, SUB_INT0 Sub-level interrupt indication_0 W/C 0000 0000 03 Sub Level Interrupt_0 Mask, SUB_INT0_ MASK Sub-level interrupt mask for SUB_INT0 R/W 0011 1111 04 Sub Level Interrupt_1, SUB_INT1 Sub-level interrupt indication_1 W/C 0000 0000 05 Sub Level Interrupt_1 Mask, SUB_INT1_ MASK Sub-level interrupt mask for SUB_INT1 R/W 0111 1111 06 Sub Level Interrupt_2, SUB_INT2 Sub-level interrupt indication_2 W/C 0000 0000 07 Sub Level Interrupt_2 Mask, SUB_INT2_ MASK Sub-level interrupt mask for SUB_INT2 R/W 1111 1111 08 RSVD Reserved R/W 0000 0000 09 Top Level Control_0, TOP_CNTL0 Top level system control_0 R/W 0100 0001 0A Top Level Control_1, TOP_CNTL1 Top level system control_1 R/W 1000 1001 0B Top Level Control_2, TOP_CNTL2 Top level system control_2 R/W 1100 1110 0C Top Level Control_3, TOP_CNTL3 Top level system control_3 R/W 0000 0001 0D Top Level Control_4, TOP_CNTL4 Top level system control_4 W 0000 0000 0E – 0F RSVD Reserved Battery Charger Control 10 Battery Charger Control_0, CHG_CNTL0 Battery charger control register_0 R/W 0000 0011 11 Battery Charger Control_1, CHG_CNTL1 Battery charger control register_1 R/W 0000 1000 12 Battery Charger Control_2, CHG_CNTL2 Battery charger control register_2 R/W 0000 0100 13 Battery Charger Control_3, CHG_CNTL3 Battery charger control register_3 R/W 0000 1000 14 Battery Charger Control_4, CHG_CNTL4 Battery charger control register_4 R/W 0000 0100 15 Battery Charger Control_5, CHG_CNTL5 Battery charger control register_5 R/W 0001 1110 Table 8. Register map PCA9420 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 4.0 — 28 November 2022 25 / 87 |
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