| Electronic Components Datasheet Search |
|
PCA9420 Datasheet(PDF) 75 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCA9420 Datasheet(HTML) 75 Page - NXP Semiconductors |
|
75 / 87 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications Symbol Parameter Conditions Min Typ Max Unit MODESEL0/MODESEL1 VIH1 Logic Input High Threshold 1.5 V VIL1 Logic Input Low Threshold 0.4 V ILK1 Logic Pin Leakage Current Pulled up to 5.0 V 0.1 1 µA tdebounce_1 Debounce time for MODESEL0, MODESEL1 1 µs ON VIH2 Logic Input High Threshold Note: ON pin internally pulled up, no external pull-up voltage needed. 70 % * VBAT V VIL2 Logic Input Low Threshold 0.4 V tdebounce Debounce time for ON To initiate the default power-up sequence 200 µs SYSRSTn, INTB VOL1 Low-level output voltage at 1 mA sink current 0.5 V ILK2 Logic Pin Leakage Current Pulled up to 5.0 V 0.01 0.1 µA VPULLUP1 Minimum Supply Voltage for valid Open-drain signal 1.5 V Table 86. EC table for I2C and Logic...continued [1] Guaranteed by design and characterization; not tested in production. PCA9420 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 4.0 — 28 November 2022 75 / 87 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |