PCA9420 datasheet(5/87 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

6.2 Pin description

Symbol

HVQFN24

WLCSP25

Pin Type

Description

INPUT SUPPLY

VIN

Input supply voltage. Bypass with a 2.2 µF/10 V ceramic

capacitor. If VIN is greater than 6 V, the voltage rating shall

be changed to a higher voltage than the maximum voltage

in applications.

ASYS

Bypass output of VIN and input supply voltage for LDO2

and linear charger, connect with a typical 4.7 µF or

10 µF/10 V decoupling capacitor.

VBAT_BKUP

Backup battery input voltage. LDO1 is powered by the

greater of ASYS or VAT_BKUP. If a back-up battery with a

coin cell is not connected, connect the pin to VBAT power

domain. Connect with a typical 0.47 µF/6.3 V decoupling

capacitor.

LINEAR CHARGER

VBAT

Battery (+) connection point. A typical 1 µF/10 V decoupling

capacitor should be connected between VBAT to system

ground.

Battery temperature sensing pin. An external thermistor is

connected between TS pin and system ground. If the pin is

not used, leave the pin open.

BUCK1 STEP_DOWN CONVERTER (SW1)

PSYS1

Input supply for SW1. Bypass with a typical 1 µF/10 V

ceramic capacitor. Connect to ASYS power domain as short

as possible in the system.

LX1

Switching node for SW1. Connect to a 2.2 µH inductor. If the

pin is not used, leave the pin open.

SW1_OUT

Feedback pin. Bypass with a 10 µF/6.3 V ceramic capacitor.

If the pin is not used, tie to PSYS1.

PGND1

Power ground for buck 1 (SW1). Connect ground nodes of

two bypass capacitors for PSYS1 and SW1_OUT as close

to PGND1 pin as possible in the system.

BUCK2 STEP_DOWN CONVERTER (SW2)

PSYS2

Input supply for SW2. Bypass with a typical 2.2 µF/10 V

ceramic capacitor. Connect to ASYS power domain as short

as possible in the system.

LX2

Switching node for SW2. Connect to a 2.2 µH inductor. If the

pin is not used, leave the pin open.

SW2_OUT

Feedback pin. Bypass with a 10 µF/6.3 V ceramic capacitor.

If the pin is not used, tie to PSYS2.

PGND2

Power ground for buck 2 (SW2). Connect ground nodes of

two bypass capacitors for PSYS2 and SW2_OUT as close

to PGND2 pin as possible in the system.

LOW_DROPOUT REGULATORS (LDO1 and LDO2)

Table 3. Pin description

PCA9420

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4.0 — 28 November 2022

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