PCA9420 datasheet(29/87 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

Bit

Symbol

Default value Type

Function

WD_TIMER

W/C

Watchdog Timer Expiration Interrupt

0: The watchdog timer expiration has not happened since the last time

this bit was cleared.

1: The watchdog timer expiration has happened since the last time this

bit was cleared.

IN_PWR

W/C

Input Voltage Interrupt

0: The IN_PWR bit has not changed since the last time this bit was

cleared.

1: The IN_PWR bit has changed since the last time this bit was

cleared.

Table 11. Sub_INT0 register bit description...continued

9.5.4 Sub level interrupt_0 mask (Sub_INT0_Mask, address 03h)

This is a READ AND WRITE register.

Bit

Symbol

Default

value

Type

Function

RSVD

R/W

Reserved bit

RSVD

R/W

Reserved bit

ON_PUSH_INT_MASK

R/W

ON Key falling interrupt mask bit

0: Not Masked

1: Masked

TEMP_PREWARNING_MASK

R/W

Die temp pre-warning interrupt mask bit

0: Not Masked

1: Masked

THEM_SHDN_MASK

R/W

Thermal shutdown interrupt mask bit

0: Not Masked

1: Masked

ASYS_PREWARNING_MASK

R/W

ASYS Pre-Warning Voltage Interrupt Mask bit

0: Not Masked

1: Masked

WD_TIMER_MASK

R/W

Watchdog Timer Expiration Interrupt Mask bit

0: Not Masked

1: Masked

IN_PWR_MASK

R/W

Input Voltage Interrupt Mask bit

0: Not Masked

1: Masked

Table 12. Sub_INT0_Mask bit description

9.5.5 Sub level interrupt_1 (Sub_INT1, address 04h)

The sub-level interrupt register contains flags indicating the second-tier interrupt event.

For this register, it contains battery charger related interrupt events. Any of the interrupt

sources of this register trigger the CHG_INT bit on the TOP_INT register as long as they

are unmasked on the Sub_INT1_Mask register.

This is WRITE AND CLEAR register.

PCA9420

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4.0 — 28 November 2022

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