PD6710 datasheet(21/138 Pages) INTEL

21 / 138 page

ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22

Datasheet

-WE

Write Enable: For non-DMA transfers,

this signal goes active (low) to indicate

a memory write to the socket.

During a DMA read (when -IOWR is

active), this signal goes low if the ISA

output TC is active (high), indicating to

the card that the system’s terminal

count signal is active. During DMA

writes (when -IORD is active), this

output remains high.

O-TS

2 or 3

2 mA

-IORD

I/O Read: This output is driven low for I/

O reads from the socket.

O-TS

2 or 3

2 mA

-IOWR

I/O Write: This output is driven low for I/

O writes to the socket.

O-TS

2 or 3

2 mA

WP/

-IOIS16 †

Write Protect / I/O Is 16-Bit: In

Memory Card Interface mode (Interrupt

and General Control register, bit 5 is

equal to ‘0’), this input is the status of

the PC card write protect switch.

In I/O Card Interface mode, a low on

this input indicates that the I/O address

being accessed is capable of 16-bit

operation.

In DMA mode, this pin can be

programmed as the -DREQ input from

a DMA-capable PC Card.

131

I-PU

2 or 3

–

-INPACK †

Input Acknowledge: This input

indicates to the PD67XX that the PC

Card supports I/O access at the current

address. A PC Card activates this input

during IORD cycles to which the card

can respond.

In DMA mode, this pin can be

programmed as the -DREQ input from

a DMA-capable PC Card.

119

I-PU

2 or 3

–

RDY/

-IREQ †

Ready / Interrupt Request: In Memory

Card Interface mode, this input is

readable as the status of bit 5 of the

Interface Status register, which is

used by a PC Card to signal system

software of its ready or busy state.

In I/O Card Interface mode, this active-

low input indicates an interrupt request.

101

I-PU

2 or 3

–

-WAIT †

Wait: This input indicates to the

PD67XX that the current card access

cycle is to be extended until this signal

becomes inactive (high).

116

I-PU

2 or 3

–

Table 2.

Socket Interface Pins (Sheet 2 of 4)

Pin Name1

Description2

Pin Number

Qty.

I/O

Pwr.

Drive

PD6710

PD6722

Socket A

Socket B

1. 1To differentiate the sockets, all PD6722 pin names have either A_ or B_ prepended to the pin names indicated. For example,

A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.

2. 2When a socket is configured as an ATA drive interface, socket interface pin functions change. See Table 17 on page 88.

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