PD6710 datasheet(30/138 Pages) INTEL

30 / 138 page

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers

Datasheet

4.1.3

PD67XX Functional Blocks

4.1.4

Interrupts

The PD67XX provides ten interrupt pins that are labeled with names suggesting their mapping in

the system, though there are no hard requirements specifying the exact mapping. Typically, all ten

interrupt pins should be connected to system interrupt signals to allow maximum flexibility in

programming interrupt routing from the PD67XX.

Classes of Interrupts

The PD67XX supports two classes of interrupts:

• Socket or card interrupts initiated by the PC Card activating its RDY/-IREQ signal

• Management interrupts triggered by changes in PC Card status, including:

— Card insertion or removal

— Battery warning indicator (BVD2) change on a memory-type card

— Battery dead indicator (BVD1) or I/O-type card status change (-STSCHG)

— Ready (RDY) status change on a memory-type card

Either class of interrupts can be routed to any of the ten interrupt pins on the PD67XX.

Figure 7. Functional Block Diagram

Operation

Registers

Mapper

and

Offset

Socket

Write

FIFO

Power Control

Interrupt

Control

Synthe-

Bus

Interface

Unit

sizer

Per Chip

Per Socket

Control

Data

Address

VCC Control

VPP Control

Control

Address

Data

Clock

INTR

IRQs

Bus Control

Timing Control

-WAIT

WP/-IOIS16

CD1, CD2

RDY/-IREQ

BVD, -STSCHG

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