RT600 datasheet(45/171 Pages) NXP

45 / 171 page

RT600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.1 — 7 July 2023

45 of 173

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

PIO7_28

N10

Z I/O 0

PIO7_28 — General-purpose digital input/output pin.

I/O 1

FC1_CTS_SDA_SSEL0 — Flexcomm 1: USART

clear-to-send, I2C data I/O, SPI Slave Select 0.

R — Reserved.

I/O 5

R — Reserved.

PIO7_29

R10

Z I/O 0

PIO7_29 — General-purpose digital input/output pin.

I/O 1

FC1_RTS_SCL_SSEL1 — Flexcomm 1: USART

request-to-send, I2C clock, SPI slave select 1.

R — Reserved.

I/O 5

R — Reserved.

PIO7_30

P10

Z I/O 0

PIO7_30 — General-purpose digital input/output pin.

I/O 1

FC1_SSEL2 — Flexcomm 1: SPI slave select 2.

R — Reserved.

I/O 5

FC2_TXD_SCL_MISO_WS — Flexcomm 2: USART

transmitter, I2C clock, SPI master-in/slave-out data I/O, I2S

word select/frame.

R — Reserved.

PIO7_31

Z I/O 0

PIO7_31 — General-purpose digital input/output pin.

I/O 1

FC1_SSEL3 — Flexcomm 1: SPI slave select 3.

R — Reserved.

I/O 5

FC2_RXD_SDA_MOSI_DATA — Flexcomm 2: USART

receiver, I2C data I/O, SPI master-out/slave-in data, I2S data

I/O.

R — Reserved.

PMIC_I2C_SCL -

E16

[2]

Z O

- I2C clock. Used for communication with an off-chip PMIC, if

present. It is not an open drain pin.

PMIC_I2C_SDA -

F16

[2]

Z I/O - I2C data. Used for communication with an off-chip PMIC, if

present. It is not an open drain pin.

Table 4.

Pin description …continued

Symbol

Description

RT600 Datasheet(PDF) 45 Page - NXP Semiconductors

RT600 Datasheet(HTML) 45 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL