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RT600 Datasheet(PDF) 86 Page - NXP Semiconductors |
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RT600 Datasheet(HTML) 86 Page - NXP Semiconductors |
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86 / 171 page ![]() RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2023. All rights reserved. Product data sheet Rev. 2.1 — 7 July 2023 86 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs • 12-bit conversion rate of 5.0 Msamples/s. Options for reduced resolution at higher conversion rates. • Burst conversion mode for single or multiple inputs. • Synchronous or asynchronous operation. Asynchronous operation maximizes flexibility in choosing the ADC clock frequency, Synchronous mode minimizes trigger latency and can eliminate uncertainty and jitter in response to a trigger. 10.20.2 Temperature sensor The temperature sensor transducer uses an intrinsic pn-junction diode reference and outputs a CTAT voltage (Complement To Absolute Temperature). The temperature sensor is only approximately linear with a slight curvature. The output voltage is measured over different ranges of temperatures and fit with linear-least-square lines. After power-up, the temperature sensor output must be allowed to settle to its stable value before it can be used as an accurate ADC input. 10.20.3 Analog Comparator The comparator (CMP) module provides a circuit for comparing two analog input voltages. The comparator circuit is designed to operate across the full range of the supply voltage, known as rail-to-rail operation. 10.21 Security features The security system on RT600 has a set of hardware blocks and ROM code to implement the security features of the device. The hardware consists of an AES engine, a SHA engine (Hash-AES block), a random number generator, and a key storage block that keys from an SRAM based PUF (Physically Unclonable Function). All components of the system can be accessed by the processor or the DMA engine to encrypt or decrypt data and for hashing. The ROM is responsible for secure boot in addition to providing support for various security functions. 10.21.1 Features • Trust Zone M • AES256 Decryption Engine. • SHA-1, SHA-2 HASH Engine. • Physical Unclonable Function (PUF) Key Generation. • CASPER security Cortex-M33 co-processor. • Random number generator (RNG). • On-the-Fly Decryption on Octal/Quad0 SPI interface. • Universally Unique Identifier (UUID) • Device Identifier Composition Engine (DICE) 10.21.2 AES256 RT600 devices provide an on-chip hardware AES encryption and decryption engine to protect the image content and to accelerate processing for data encryption or decryption, data integrity, and proof of origin. Data can be encrypted or decrypted by the AES engine using a key from the PUF or a software supplied key. |
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