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TMPR4925 Datasheet(PDF) 414 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 414 Page - Toshiba Semiconductor |
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414 / 590 page ![]() Chapter 14 AC-link Controller 14-4 14.3.1.2 5.1 Channel Audio Connection This sample assumes one CODEC with four DACs mapped to stereo front (3&4) and stereo rear (7&8) slots, and another CODEC with two DACs mapped to center (6) and LFE (9) slots. Figure 14.3.2 5.1 Channel Audio Connection Diagram 14.3.2 Pin Configuration To utilize ACLC, the Select ACLC (SELACLC) bit in Pin Configuration Register (PCFG) must be set to 1. Refer to the Sections 3.3 and 5.2.3 for the detail of the pin configuration. SDIN1 ACRESET* BITCLK SYNC SDOUT SDIN0 ACLC CID0 RESET# BIT_CLK SYNC SDATA_OUT SDATA_IN 4 Channel Audio CODEC (CODEC ID=’0’) CID1 CID0 RESET# BIT_CLK SYNC SDATA_OUT SDATA_IN 2 Channel Audio CODEC (CODEC ID=‘3’) CID1 GND |
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