UPD17231 datasheet(73/94 Pages) RENESAS

73 / 94 page

Data Sheet U14360EJ1V0DS00

µPD17230, 17231, 17232, 17233, 17234, 17235, 17236

12.2 Legend

: Address register

ASR

: Address stack register specified by stack pointer

addr

: Program memory address (low-order 11 bits)

BANK

: Bank register

CMP

: Compare register

: Carry flag

DBF

: Data buffer

entry

: Entry address of system segment

: Halt releasing condition

INTEF

: Interrupt enable flag

INTR

: Register automatically saved to stack in case of interrupt

INTSK

: Interrupt stack register

: Index register

: Data memory row address pointer

MPE

: Memory pointer enable flag

: Data memory address specified by mR, mC

: Data memory row address (high)

: Data memory column address (low)

: Bit position (4 bits)

n4 :

Immediate data (4 bits)

PAGE

: Page (bit 11 and 12 of program counter)

: Program counter

: Peripheral address

: Peripheral address (high-order 3 bits)

: Peripheral address (low-order 4 bits)

: General register column address

: Register file address

rfR

: Register file row address (high-order 3 bits)

rfC

: Register file column address (low-order 4 bits)

: Stack pointer

: Stop releasing condition

: Window register

(

×)

: Contents addressed by

UPD17231 Datasheet(PDF) 73 Page - Renesas Technology Corp

UPD17231 Datasheet(HTML) 73 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

Datasheet Download

Link URL