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UPD17231 Datasheet(PDF) 82 Page - Renesas Technology Corp |
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UPD17231 Datasheet(HTML) 82 Page - Renesas Technology Corp |
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82 / 94 page ![]() Data Sheet U14360EJ1V0DS00 µPD17230, 17231, 17232, 17233, 17234, 17235, 17236 80 AC Characteristics (TA = –40 to +85 °C, VDD = 2.0 to 3.6 V) Item Symbol Conditions MIN. TYP. MAX. Unit CPU clock cycle timeNote tCY1 3.8 33 µs (Instruction execution time) tCY2 VDD = 2.2 to 3.6 V 1.9 33 µs INT high/low level width tINTH, 20 µs tINTL RESET low level width tRSL 10 µs Note The CPU clock cycle time (instruction execution time) is determined by the oscillation frequency of the reso- nator connected and SYSCK (RF: address 02H) of the register file. The figure on the right shows the CPU clock cycle time tCY vs. supply voltage VDD characteristics (refer to 4. CLOCK GENERATOR CIRCUIT). tCY vs VDD Supply voltage VDD (V) 2 1 3 4 5 6 7 8 9 10 33 40 2 01 3 4 3.8 1.9 2.2 3.6 Operation guaranteed area |
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