ATMEGA640 datasheet(148/449 Pages) ATMEL

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ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Compare Match Output

Unit

The Compare Output mode (COMnx1:0) bits have two functions. The Waveform Gener-

ator uses the COMnx1:0 bits for defining the Output Compare (OCnx) state at the next

compare match. Secondly the COMnx1:0 bits control the OCnx pin output source. Fig-

ure 52 shows a simplified schematic of the logic affected by the COMnx1:0 bit setting.

The I/O Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of

the general I/O Port Control Registers (DDR and PORT) that are affected by the

COMnx1:0 bits are shown. When referring to the OCnx state, the reference is for the

internal OCnx Register, not the OCnx pin. If a system reset occur, the OCnx Register is

reset to “0”.

Figure 52. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the Output Compare (OCnx) from the

Waveform Generator if either of the COMnx1:0 bits are set. However, the OCnx pin

direction (input or output) is still controlled by the Data Direction Register (DDR) for the

port pin. The Data Direction Register bit for the OCnx pin (DDR_OCnx) must be set as

output before the OCnx value is visible on the pin. The port override function is generally

independent of the Waveform Generation mode, but there are some exceptions. Refer

to Table 83, Table 84 and Table 85 for details.

The design of the Output Compare pin logic allows initialization of the OCnx state before

the output is enabled. Note that some COMnx1:0 bit settings are reserved for certain

modes of operation. See “Register Description” on page 160.

The COMnx1:0 bits have no effect on the Input Capture unit.

Compare Output Mode and

Waveform Generation

The Waveform Generator uses the COMnx1:0 bits differently in normal, CTC, and PWM

modes. For all modes, setting the COMnx1:0 = 0 tells the Waveform Generator that no

action on the OCnx Register is to be performed on the next compare match. For com-

pare output actions in the non-PWM modes refer to Table 83 on page 161. For fast

PWM mode refer to Table 84 on page 161, and for phase correct and phase and fre-

quency correct PWM refer to Table 85 on page 161.

PORT

DDR

OCnx

Waveform

Generator

COMnx1

COMnx0

FOCnx

clk

I/O

ATMEGA640 Datasheet(PDF) 148 Page - ATMEL Corporation

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