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STPMIC25 Datasheet(PDF) 109 Page - STMicroelectronics |
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STPMIC25 Datasheet(HTML) 109 Page - STMicroelectronics |
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109 / 145 page ![]() 6.7 NVM registers 6.7.1 NVM status register (NVM_SR) Table 79. NVM_SR 7 6 5 4 3 2 1 0 reserved reserved reserved reserved reserved reserved NVM_WRITE_FAIL NVM_BUSY R R R R R R R R • Address: 0x8E • Default: 0x00 • Description: NVM status register. [7:2 reserved [1] NVM_WRITE_FAIL: Error in writing to the NVM. The LOCK_NVM bit is set. 0: Write is successful or no write operation done 1: Write to the NVM failed [0] NVM_BUSY: NVM controller status 0: NVM controller is in an idle state 0: NVM controller is in an idle state 1: NVM controller is in a busy state Self-cleared when the operation is completed STPMIC25 Register descriptions DS14278 - Rev 3 page 109/145 |
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