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AD82088 Datasheet(PDF) 36 Page - Elite Semiconductor Memory Technology Inc. |
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AD82088 Datasheet(HTML) 36 Page - Elite Semiconductor Memory Technology Inc. |
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36 / 84 page ![]() ESMT AD82088 Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision: 2.4 36/84 Detail Description for Register Note that the highlighted columns are default values of these tables. If there is no highlighted value, the default setting of this bit is determined by the external pin. Address 0X00 : State control 1 AD82088 supports multiple serial data input formats including I 2S, Left-alignment and Right-alignment. These formats are selected by user via bit7~bit5 of address 0X00. The left/right channels can be exchanged to each other by programming to address 0/bit0, LREXC. BIT NAME DESCRIPTION VALUE FUNCTION B[7:5] IF[2:0] Input Format 000 I 2S 16-24 bits 001 Left-alignment 16-24 bits 010 Right-alignment 16 bits 011 Right-alignment 18 bits 100 Right-alignment 20 bits 101 Right-alignment 24 bits B[4] Reserved B[3] PWML_X LA/LB exchange 0 No exchanged 1 L/R exchanged B[2] PWMR_X RA/RB exchange 0 L/R exchanged 1 No exchanged B[1] LV_UVSEL LV under voltage selection 0 2.9V 1 2.7V B[0] LREXC Left/Right (L/R) Channel exchanged 0 No exchanged 1 L/R exchanged |
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