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AD82088 Datasheet(PDF) 7 Page - Elite Semiconductor Memory Technology Inc. |
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AD82088 Datasheet(HTML) 7 Page - Elite Semiconductor Memory Technology Inc. |
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7 / 84 page ![]() ESMT AD82088 Elite Semiconductor Microelectronics Technology Inc. Publication Date: Oct. 2022 Revision: 2.4 7/84 Pin Description (E-TSSOP 24L) PIN NAME TYPE DESCRIPTION CHARACTERISTICS 1 ERROR I/O ERROR pin is a dual function pin. One is I 2C address setting during power up. The other one is error status report (low active), It sets by register of A_SEL_FAULT at address 0x1C B[6] to enable it. This pin is monitored on the rising edge of reset. A value of Low (15- kΩ pull down) sets the I 2C device address to 0x30 and a value of High (15- kΩ pull up) sets it to 0x31. 2 PD I Power down, low active. Schmitt trigger TTL input buffer, internal pull High with a 330Kohm resistor. 3 LRCIN I Left/Right clock input (Fs). Schmitt trigger TTL input buffer, internal pull Low with a 100Kohm resistor. 4 BCLK I Bit clock input (64Fs). Schmitt trigger TTL input buffer, internal pull Low with a 100Kohm resistor. 5 SDATA I Serial audio data input. Schmitt trigger TTL input buffer 6 SDA I/O I 2C bi-directional serial data. Schmitt trigger TTL input buffer 7 SCL I I 2C serial clock input. Schmitt trigger TTL input buffer 8 SDATAO O Serial audio data output. Schmitt trigger TTL input buffer 9 DVDD P Digital Power. 10 DGND P Digital Ground. 11 VREG O 1.8V Regulator voltage output. 12 GVDD O 5V Regulator voltage output. This pin must not be used to drive external devices. 13 BST_RB P Bootstrap supply for right channel output B. 14 VDDR P Right channel supply. 15 RB O Right channel output B. 16 GNDR P Right channel ground. 17 RA O Right channel output A. 18 BST_RA P Bootstrap supply for right channel output A. 19 BST_LB P Bootstrap supply for left channel output B. 20 LB O Left channel output B. 21 GNDL P Left channel ground. 22 LA O Left channel output A. 23 VDDL P Left channel supply. 24 BST_LA P Bootstrap supply for left channel output A. |
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