AD82088 datasheet(70/84 Pages) ESMT

70 / 84 page

ESMT

AD82088

Elite Semiconductor Microelectronics Technology Inc.

Publication Date: Oct. 2022

Revision: 2.4

70/84

 Pre-scale

For each audio channel, AD82088 can scale input signal level prior to EQ processing which is realized by a

24-bit signed fractional multiplier. The pre-scale factor, ranging from -1 (0x800000) to 0.9999998808

(0x7FFFFF), for this multiplier, can be loaded into RAM. The default values of the pre-scaling factors are set

to 0x7FFFFF. Programming of RAM is described in RAM access.

 Post-scale

The AD82088 provides an additional multiplication after equalizing and before interpolation stage, which is

realized by a 24-bit signed fractional multiplier. The post-scaling factor, ranging from -1 (0x800000) to

0.9999998808 (0x7FFFFF), for this multiplier, can be loaded into RAM. The default values of the

post-scaling factors are set to 0x7FFFFF. All channels can use the channel-1 post-scale factor by setting the

post-scale link. Programming of RAM is described in RAM access.

 Power Clipping

The AD82088 provides power clipping function to avoid excessive signal that may destroy loud speaker. 3.

The power clipping level is defined by 24-bit representation and is stored in RAM address 0X55 of RAM

bank 0. The following table shows the power clipping level

’s numerical representation.

Sample calculation for power clipping

Max

amplitude

Linear

Decimal

Hex

(3.21 format)

PVDD

2097152

200000

PVDD*0.707

-3

0.707

1482686

169FBE

PVDD*0.5

-6

0.5

1048576

100000

PVDD*L

L=10

(x/20)

D=2097152xL

H=dec2hex(D)

 Attack threshold

The AD82088 provides DRC function. When the input RMS exceeds the programmable attack threshold

value, the output power will be limited by this threshold power level via gradual gain reduction. Four sets of

DRC are provided. DRC1 is used for high frequency path in three bands DRC and used for L/R channel in

one band DRC. DRC2 is used for low frequency path in three bands DRC. DRC3 is used for band pass

frequency path in three bands DRC. DRC4 is used for the post DRC.

Attack threshold is defined by 24-bit presentation and is stored in RAM address 0X56, 0X58, 0X5A, 0X5C of

RAM bank 0.

AD82088 Datasheet(PDF) 70 Page - Elite Semiconductor Memory Technology Inc.

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