PM4354-PI datasheet(63/463 Pages) PMC

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PM4354 COMET-QUAD

DATASHEET

PMC-1990315

ISSUE 6

FOUR CHANNEL COMBINED E1/T1/J1

TRANSCEIVER / FRAMER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC. AND FOR ITS CUSTOMERS’ INTERNAL USE

consecutive intervals as defined by the period of the supplied transfer clock signal (typically 1

second). When the transfer clock signal is applied, the PMON transfers the counter values into

holding registers and resets the counters to begin accumulating events for the interval. The

counters are reset in such a manner that error events occurring during the reset are not missed.

If the holding registers are not read between successive transfer clocks, an OVR overrun register

bit is asserted.

Generation of the transfer clock within a quadrant is performed by writing to any counter register

location within the quadrant or by writing to the Revision/Chip ID/Quadrant PMON Update register.

The holding register addresses are contiguous to facilitate faster polling operations.

9.12 T1 Automatic Performance Report Generation (APRM)

In compliance with the ANSI T1.231, T1.403 and T1.408 standards, a performance report is

generated each second for T1 ESF applications. The report conforms to the HDLC protocol and

is inserted into the ESF facility data link.

The performance report can only be transmitted if the TDPR is configured to insert the ESF

Facility Data Link and the PREN bit of the TDPR Configuration register is logic 1. The

performance report takes precedence over incompletely written packets, but it does not pre-empt

packets already being transmitted.

See the Operation section for details on the performance report encoding.

9.13 T1 Alarm Integrator (ALMI)

The T1 Alarm Integration function is provided by the ALMI block. This block detects the presence

of Yellow, Red, and AIS Carrier Fail Alarms (CFA) in SF, or ESF formats. The alarm detection and

integration is compatible with the specifications defined in ANSI T1.403 and TR-TSY-000191.

The ALMI block declares the presence of Yellow alarm when the Yellow pattern has been received

for 425 ms (± 50 ms); the Yellow alarm is removed when the Yellow pattern has been absent for

425 ms (± 50 ms). The presence of Red alarm is declared when an out of frame condition has

been present for 2.55 sec (± 40 ms); the Red alarm is removed when the out of frame condition

has been absent for 16.6 sec (± 500 ms). The presence of AIS alarm is declared when an out of

frame condition and all-ones in the PCM data stream have been present for 1.5 sec (±100 ms);

the AIS alarm is removed when the AIS condition has been absent for 16.8 sec (±500 ms).

CFA alarm detection algorithms operate in the presence of a 10-3 bit error rate.

The ALMI also indicates the presence or absence of the Yellow, Red, and AIS alarm signal

conditions over 40 ms, 40 ms, and 60 ms intervals, respectively, allowing an external

microprocessor to integrate the alarm conditions via software with any user-specific algorithms.

Alarm indication is provided through internal register bits.

PM4354-PI Datasheet(PDF) 63 Page - PMC-Sierra, Inc

PM4354-PI Datasheet(HTML) 63 Page - PMC-Sierra, Inc

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