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PM7347 Datasheet(PDF) 247 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 247 Page - PMC-Sierra, Inc |
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247 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 247 Document ID: PMC-1990267, Issue 3 Register 3AEH: PRGD Pattern Detector #3 Bit Type Function Default Bit 7 R PD[23] 0 Bit 6 R PD[22] 0 Bit 5 R PD[21] 0 Bit 4 R PD[20] 0 Bit 3 R PD[19] 0 Bit 2 R PD[18] 0 Bit 1 R PD[17] 0 Bit 0 R PD[16] 0 Register 3AFH: PRGD Pattern Detector #4 Bit Type Function Default Bit 7 R PD[31] 0 Bit 6 R PD[30] 0 Bit 5 R PD[29] 0 Bit 4 R PD[28] 0 Bit 3 R PD[27] 0 Bit 2 R PD[26] 0 Bit 1 R PD[25] 0 Bit 0 R PD[24] 0 PD[31:0] PD[31:0] contain the pattern detector data. The values contained in these registers are determined by the PDR[1:0] bits in the control register. When PDR[1:0] is set to 00 or 01, PD[31:0] contain the pattern receive register. The 32 bits received immediately before the last accumulation interval are present on PD[31:0}. PD[31] contains the first of the 32 received bits, PD[0] contains the last of the 32 received bits. When PDR[1:0] is set to 10, PD[31:0] contain the error counter holding register. The value in this register represents the number of bit errors that have been accumulated since the last accumulation interval. Note: Bit errors are not accumulated while the pattern detector is out- of-sync. When PDR[1:0] is set to 11, PD[31:0] contain the bit counter holding register. The value in this register represents the total number of bits that have been received since the last accumulation interval. The values of PD[31:0] are updated whenever one of the four PRGD Pattern Detector Registers is written or when Register 006H, the S/UNI-JET Identification, Master Reset, and Global Monitor Update Register is written. |
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