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PM7347 Datasheet(PDF) 243 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 243 Page - PMC-Sierra, Inc |
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243 / 341 page  S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 243 Document ID: PMC-1990267, Issue 3 Register 3A4H: PRGD Error Insertion Register Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 R/W EVENT 0 Bit 2 R/W EIR[2] 0 Bit 1 R/W EIR[1] 0 Bit 0 R/W EIR[0] 0 EVENT A low-to-high transition on the EVENT bit causes a single bit error to be inserted in the generated pattern. This bit must be cleared and set again for a subsequent error to be inserted. EIR[2:0] The EIR[2:0] bits control the insertion of a programmable bit error rate as indicated in Table 26: Table 26 PRGD Generated Bit Error Rate Configurations EIR[2:0] Generated Bit Error Rate 000 No errors inserted 001 10-1 010 10-2 011 10-3 100 10-4 101 10-5 110 10-6 111 10-7 |
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