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PM7347 Datasheet(PDF) 252 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 252 Page - PMC-Sierra, Inc |
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252 / 341 page  S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 252 Document ID: PMC-1990267, Issue 3 Addr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 436H 444H 465H RENB 3 466H RADR[2] 4 RADR[1] 4 RADR[0] 4 RFCLK 480H ATM8 482H PHY_ADR[2] TADR[2] 1 TSOC TENB 2 TPRTY TFCLK 483H PHY_ADR[1] PHY_ADR[0] TADR[1] 1 TADR[0] 1 484H TDAT[15] TDAT[14] TDAT[13] TDAT[12] TDAT[11] TDAT[10] TDAT[9] TDAT[8] 485H TDAT[7] TDAT[6] TDAT[5] TDAT[4] TDAT[3] TDAT[2] TDAT[1] TDAT[0] 50CH 50FH REF8KI 530H 536H 544H 565H 60CH 630H 636H 644H 665H RADR[0] 4 70CH TIOHM TICLK TPOH TPOHINS 730H RCLK 736H TOH TOHINS 744H RPOS RNEG 765H RADR[1] 4 Notes 1. Before reading these values, the input must be set to the test state, TENB must be set to logic one, and TFCLK must transition from logic zero to logic one. 2. Before its value will be captured in the test register, TENB must be set to its test state and TFCLK must transition from logic zero to logic one. 3. Before its value will be captured in the test register RENB must be set to its test state and RFCLK must transition from logic zero to logic one. 4. Before reading these values, the input must be set to the test state, RENB must be set to logic one, and RFCLK must transition from logic zero to logic one. Writing the address locations shown in Table 29 forces the outputs to the value in the corresponding bit position. Note: Zeros should be written to all unused test register locations. |
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