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PM7347 Datasheet(PDF) 337 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 337 Page - PMC-Sierra, Inc |
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337 / 341 page  S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 337 Document ID: PMC-1990267, Issue 3 Figure 82 JTAG Port Interface Timing tSTMS tHTMS TMS TCK tSTDI tHTDI TDI tP TDO TDO TCK TCK t0 TCK t1 TRSTB tVTRSTB Notes (on Input Timing) 1. When a set-up time is specified between an input and a clock, the set-up time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock. 2. When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt point of the input. 3. It is recommended that the load on TGAPCLK[x] be kept less than 50pF. A larger load on these pins may result in functional failures. 4. This parameter is guaranteed by design. No production tests are done on this parameter. 5. High pulse width is measured from the 1.4 Volt points of the rise and fall ramps. Low pulse width is measured from the 1.4 Volt points of the fall and rise ramps. |
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