PM7347 datasheet(177/341 Pages) PMC

177 / 341 page

S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

177

Document ID: PMC-1990267, Issue 3

Bit

Type

Function

Default

Bit 7

R/W

INTE

Bit 6

R/W

INTC[6]

Bit 5

R/W

INTC[5]

Bit 4

R/W

INTC[4]

Bit 3

R/W

INTC[3]

Bit 2

R/W

INTC[2]

Bit 1

R/W

INTC[1]

Bit 0

R/W

INTC[0]

INTC[6:0]

The INTC[6:0] bits control the assertion of FIFO fill level set point interrupts. The value of

INTC[6:0] = ‘b0000000 sets the interrupt FIFO fill level to 128.

INTE

The Interrupt Enable bit (INTE) must set to logic one to allow the internal interrupt status to

be propagated to the INTB output. When the INTE bit is logic zero the RDLC will not assert

INTB.

The contents of the Interrupt Control Register should only be changed when the EN bit in the

RDLC Configuration Register is logic zero. This prevents any erroneous interrupt generation.

PM7347 Datasheet(PDF) 177 Page - PMC-Sierra, Inc

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