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PM7347 Datasheet(PDF) 180 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 180 Page - PMC-Sierra, Inc |
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180 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 180 Document ID: PMC-1990267, Issue 3 Register 353H: RDLC Data Bit Type Function Default Bit 7 R RD[7] X Bit 6 R RD[6] X Bit 5 R RD[5] X Bit 4 R RD[4] X Bit 3 R RD[3] X Bit 2 R RD[2] X Bit 1 R RD[1] X Bit 0 R RD[0] X Consecutive reads of the RDLC Status and Data Registers should not occur at rates greater than 1/10 that of the clock selected by the LINESYSCLK bit of the S/UNI-JET Miscellaneous Register (39BH). RD[7:0] RD[7:0] contains the received data link information. RD[0] corresponds to the first received bit of the data link message. This register reads from the RDLC 128-byte FIFO buffer. If data is available, the FE bit in the FIFO Input Status Register is logic zero. When an overrun is detected, an interrupt is generated and the FIFO buffer is held cleared until the RDLC Status Register is read. |
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