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TMPR3927 Datasheet(PDF) 54 Page - Toshiba Semiconductor |
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TMPR3927 Datasheet(HTML) 54 Page - Toshiba Semiconductor |
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54 / 512 page ![]() Chapter 3 Pins 3-8 Signal Name I/O Description Debug interface GDCLK O Debug Clock Signal Clock signal for an external real-time debug system. GSDAO [1:0] O Serial Data and Address Output/Target PC Output signals for an external real-time debug system. GPCST [3:0] O PC Trace Status PC trace output signals for an external real-time debug system. GDRESET* I Debug Reset Reset signal for an external real-time debug system. The pin is equipped with an internal pull-up resistor. GDBGE* I Debugger Enable Enable signal for an external real-time debug system. The pin is equipped with an internal pull-up resistor. GSDI* I Serial Data input/Debug Interrupt Input signal for an external real-time debug system. The pin is equipped with an internal pull-up resistor. Other signals TEST* ITest Test pin. Fix the pin to high. The pin is equipped with an internal pull-up resistor. SCAN_ENB* I Scan Mode Test Control Test pin. Fix the pin to high. The pin is equipped with an internal pull-up resistor. PLLVDD Power supply pin for the PLL. Supply 2.5 V. PLLVSS Ground pin for the PLL. VDD2 Power supply pin for the internal logic. Supply 2.5 V. VSS2 Ground pin for the internal logic. VDDS Power supply pin for the I/O ports. Supply 3.3 V. VSS Ground pin for the I/O ports. |
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