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TMPR4937 Datasheet(PDF) 383 Page - Toshiba Semiconductor

Part # TMPR4937
Description  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 Datasheet(HTML) 383 Page - Toshiba Semiconductor

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Chapter 11 Serial I/O Port
11-23
11.4.8 Transmit FIFO Register 0 (SITFIFO0) 0xF31C (Ch. 0)
Transmit FIFO Register 1 (SITFIFO1) 0xF41C (Ch. 1)
When using the DMA Controller to perform DMA transmission, set the following addresses in the
Destination Address Register (DMDARn) of the DMA Controller according to the Endian Mode bit
(DMCCRn.LE) setting of the DMA Controller.
•
Little Endian:
0xF31C (Ch.0), 0xF41C (Ch.1)
•
Big Endian:
0xF31F (Ch.0), 0xF41F (Ch.1)
31
16
Reserved
: Type
: Initial value
15
8
7
0
Reserved
TxD
W
: Type
⎯
: Initial value
Bit
Mnemonic
Field Name
Description
Read/Write
31:8
Reserved
⎯
7:0
TxD
Transmission
Data
Transmit Data
Data written to this register are written to the Transmit FIFO.
W
Figure 11.4.8 Transmit FIFO Register



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