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TMPR4937 Datasheet(PDF) 429 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 429 Page - Toshiba Semiconductor |
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429 / 552 page  Chapter 14 AC-link Controller 14-23 14.4.4 ACLC Interrupt Status Register 0xF710 This register shows various kinds of AC-link and ACLC status. 31 16 Reserved : Type : Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MODIE RR MODOE RR Reserved AUDIE RR LFEERR CENTE RR SURRE RR AUDOE RR Reserved GPIOINT REGAC CRDY Reserved CODEC 1RDY CODEC 0RDY R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R R : Type 0 0 0 0 0 0 0 0 1 0 0 : Initial value Bit Mnemonic Field Name Description Read/Write 31:16 — Reserved ⎯ MODIERR: Modem Receive-data DMA Overrun R/W1C 15 MODIERR Modem Receive-data DMA Overrun R W1C 1: Indicates that the modem receive-data DMA overran. This bit is cleared when “1” is written to it. MODOERR: Modem Transmit-data DMA Underrun R/W1C 14 MODOERR Modem Transmit-data DMA Underrun R W1C 1: Indicates that the modem transmit-data DMA underran. This bit is cleared when “1” is written to it. 13 ⎯ Reserved ⎯ AUDIERR: Audio Receive-data DMA Overrun R/W1C 12 AUDIERR Audio Receive-data DMA Overrun R W1C 1: Indicates that the audio receive-data DMA overran. This bit is cleared when “1” is written to it. LFEERR: Audio LFE Transmit-data DMA Underrun R/W1C 11 LFEERR Audio LFE Transmit-data DMA Underrun R W1C 1: Indicates that the audio LFE transmit-data DMA underran. This bit is cleared when “1” is written to it. CENTERR: Audio Center Transmit-data DMA Underrun R/W1C 10 CENTERR Audio Center Transmit-data DMA Underrun R W1C 1: Indicates that the audio center transmit-data DMA underran. This bit is cleared when “1” is written to it. SURRERR: Audio Surround L&R Transmit-data DMA Underrun R/W1C 9 SURRERR Audio Surround L&R Transmit-data DMA Underrun R W1C 1: Indicates that the audio surround L&R transmit-data DMA underran. This bit is cleared when “1” is written to it. AUDOERR: Audio PCM L&R Transmit-data DMA Underrun R/W1C 8 AUDOERR Audio PCM L&R Transmit- data DMA Underrun R W1C 1: Indicates that the audio PCM L&R transmit-data DMA underran. This bit is cleared when “1” is written to it. 7:6 ⎯ Reserved ⎯ GPIOINT: GPIO Interrupt R/W1C 5 GPIOINT GPIO Interrupt R W1C 1: Indicates that the incoming slot 12 bit[0] is ‘1’ (the modem CODEC GPIO interrupt). This bit is cleared if “1” is written to it while the incoming slot 12 bit[0] is ‘0’. Figure 14.4.4 ACINTSTS Register (1/2) |
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