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TMPR4937 Datasheet(PDF) 121 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 121 Page - Toshiba Semiconductor |
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121 / 552 page  Chapter 7 External Bus Controller 7-21 7.4.1 External Bus Channel Control Register (EBCCRn) 0x9000 (ch. 0), 0x9008 (ch. 1) 0x9010 (ch. 2), 0x9018 (ch. 3) 0x9020 (ch. 4), 0x9028 (ch. 5) 0x9030 (ch. 6), 0x9038 (ch. 7) Channel 0 can be used as Boot memory. Therefore, the default is set by the Boot signal (see 7.3.2 Global/Boot-up Options). Channels 1 - 7 have the same register configuration as Channel 0, but they have different defaults than Channel 0. When the EBCCRn is programmed using a sequence of 32-bit store instructions, the base address in the high-order 32-bit portion of the register must be written first, followed by the Master Enable bit in the low-order 32-bit portion. 63 48 BA[35:20] R/W :Type 0x01FC/0x0000 : Initial value 47 32 Reserved : Type : Initial value 31 22 21 20 19 18 17 16 Reserved BSZ PM PWT R/W R/W R/W : Type D[1:0]/00 0 0 11/00 : Initial value 15 12 11 8 7 6 5 4 3 2 0 WT CS BC RDY SP ME SHWT R/W R/W R/W R/W R/W R/W R/W : Type 111(~D[4])/0000 0 0 1 / 0 0 D[5]/0 0 A[7:6]/00 A[8]/0 0 0 0 : Initial value Only in the case of Channel 0 are fields with different defaults in the “Channel 0/Other channel” state. D[ ] represents the corresponding Data[ ] signal value when the RESET* signal is deasserted. A[ ] represents the corresponding ADDR[ ] signal value when the RESET* signal is deasserted. Bit Mnemonic Field Name Description Read/Write 63:48 BA[35:20] Base Address External Bus Control Base Address (Default: 0x01FC/0x0000) A physical address is used to specify the base address. The upper 16 bits [35:20] of the physical address are compared to the value of this field. R/W 47:22 Reserved ⎯ 21:20 BSZ Bus Width External Bus Control Bus Size (Default: DATA[1:0]/00) Specifies the memory bus width. 00: Reserved 10: 16-bit width 01: 32-bit width 11: 8-bit width Note: DATA[1:0] is set to Channel 0 as the default. R/W 19:18 PM Page Mode Page Size External Bus Control Page Mode Page Size (Default: 00) Specifies the Page mode (Page mode memory support) use and page size. 00: Normal mode 01: 4-page mode 10: 8-page mode 11: 16-page mode R/W Figure 7.4.1 External Bus Channel Control Register (1/3) |
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