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TMPR4956C Datasheet(PDF) 127 Page - Toshiba Semiconductor |
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TMPR4956C Datasheet(HTML) 127 Page - Toshiba Semiconductor |
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127 / 286 page  Chapter 7 Debug Support Unit 7-1 7. Debug Support Unit 7.1 Features 1. TX4956 can provide various kinds of execution controls and access to registers of TX49/H4 core through EJTAG interface implemented by the debug support unit inside TX49/H4 Core. 2. Supports DMA access through EJTAG interface to internal processor bus to access system memory. 3. Debug functions • Instruction Address Break • Data Bus break • Processor Bus Break • Hardware Debug Interrupt • Reset, NMI, Interrupt Mask 7.2 EJTAG Interface This interface consists of external signals for a Run Time Mode. The Run Time Mode provides functions such as processor Run, STOP, Single Step, and access to internal registers and system memory. About TX4956 EJTAG interface signals, see Table 2.2.7 “EJTAG Interface” on Chapter 2. |
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