 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ADS6223 Datasheet(PDF) 49 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
ADS6223 Datasheet(HTML) 49 Page - Texas Instruments |
|
|
49 / 75 page  www.ti.com S0167-05 CLKP CLKM DifferentialSine-Wave orPECL orLVDSClockInput ADS6xxx 0.1 F m 0.1 F m V CC V CC REF_IN VCXO_INM CTRL OUTP OUTM Y0B Y0 ADS6xxx CLKM CLKP VCXO CDCM7005 VCXO_INP Reference Clock S0238-02 S0168-07 CLKP CLKM CMOSClockInput ADS6xxx 0.1 F m 0.1 F m ADS6225 ,, ADS6224 ADS6223, ADS6222 SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007 Figure 88. Differential Clock Driving Circuit Figure 89 shows a typical scheme using PECL clock drive from a CDCM7005 clock driver. SNR performance with this scheme is comparable with that of a low jitter sine wave clock source. Figure 89. PECL Clock Drive Using CDCM7005 Single-ended CMOS clock can be ac-coupled to the CLKP input, with CLKM (pin) connected to ground with a 0.1- μF capacitor, as shown in Figure 90. Figure 90. Single-Ended Clock Driving Circuit Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 49 Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
