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ADS6223 Datasheet(PDF) 22 Page - Texas Instruments |
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ADS6223 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 75 page ![]() www.ti.com ADS6225 ,, ADS6224 ADS6223, ADS6222 SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007 D10–D6 <TERM CLK> LVDS internal termination for bit and word clock outputs 00000 No internal termination 00001 166 Ω 00010 200 Ω 00100 250 Ω 01000 333 Ω 10000 500 Ω Any combination of above bits can also be programmed, resulting in a parallel combination of the selected values. For example, 00101 is the parallel combination of 166||250 = 100 Ω 00101 100 Ω Table 21. REGISTER BITS ADDRESS A4–A0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 <TERM DATA> 11 WORD-WISE CONTROL 0 0 0 0 LVDS INTERNAL TERMINATION - DATA OUTPUTS D4–D0 <TERM DATA> LVDS internal termination for data outputs 00000 No internal termination 00001 166 Ω 00010 200 Ω 00100 250 Ω 01000 333 Ω 10000 500 Ω Any combination of above bits can also be programmed, resulting in a parallel combination of the selected values. For example, 00101 is the parallel combination of 166||250 = 100 Ω 00101 100 Ω D10–D9 Only when 2-wire interface is selected 00 Byte-wise or bit-wise output, 1x frame clock 11 Word-wise output enabled, 0.5x frame clock 01,10 Do not use 22 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS6225 ADS6224 ADS6223 ADS6222 |
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