ADS6223 datasheet(19/75 Pages) TI

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ADS6225

,, ADS6224

ADS6223, ADS6222

SLAS543A – MAY 2007 – REVISED SEPTEMBER 2007

Table 15.

BITS

ADDRESS

A4 - A0

D10

INPUT CLOCK BUFFER GAIN CONTROL

D6–D2

<CLKIN GAIN> Input clock buffer gain control

11000

Gain 0 minimum gain

00000

Gain 1

01100

Gain 2

01010

Gain 3

01001

Gain 4

01000

Gain 5 maximum gain

Table 16.

BITS

ADDRESS

A4–A0

D10

<DF>

DATA

FORMAT -

2S COMP

TEST PATTERNS

STRAIGHT

BINARY

D7–D5

<PATTERNS> Capture test patterns

000

Normal ADC operation

001

Output all zeros

010

Output all ones

011

Output toggle pattern

100

Unused

101

Output custom pattern (contents of CUSTOM pattern registers 0x0B and 0x0C)

110

Output DESKEW pattern (serial stream of 1010..)

111

Output SYNC pattern

<DF> Data format selection

2s Complement format

Straight binary format

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