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DIX9211 Datasheet(PDF) 39 Page - Texas Instruments |
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DIX9211 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 110 page  RXIN0 RXIN1 RXIN2 RXIN3 RXIN4/ASCKI0 RXIN5/ABCKI0 RXIN6/ALRCKI0 RXIN7/ADIN0 MPIO_A0 (CLKST) SCKO MPIO_A1 (VOUT) BCK MPIO_A2 (XMCKO) LRCK MPIO_A3 (INT0) DOUT MPIO_A Selector RXIN8 RXIN9 RXIN10 RXIN11 DITOUT DITOUT RECOUT1 RECOUT1 RECOUT0 RECOUT0 RXIN7 RXIN6 RXIN5 RXIN4 RXIN3 RXIN2 RXIN1 RXIN0 FILT AUXIN0 Main Output Port DIR PLL Clock/Data Recovery Lock Detection Lock: DIR Unlock: XTI AUTO DIR XTI AUXIN0 AUXIN1 AUXIN2 AUTO DIR XTI AUXIN0 AUXIN1 AUXIN2 AUTO DIR XTI AUXIN0 AUXOUT AUXIN1 AUXIN2 MPIO_C0 (TXSCK) MPIO_C1 (TXBCK) MPIO_C2 (TXLRCK) MPIO_C3 (TXDIN) MPIO_C Selector MPIO_B0 (ASCKI2) MPIO_B1 (ABCKI2) MPIO_B2 (ALRCKI2) MPIO_B3 (ADIN2) XTI XTO MPIO_B Selector AUXIN1 OSC XTI Clock (SCK/BCK/ LRCK) Secondary BCK/LRCK Divider Selector XMCKO (To MPIO_A and MPO0/1) Divider XMCKO Divider RXIN7 DOUT SCKO/BCK/LRCK DIT MPO0 MPO0/1 Selector MPO1 SBCK/SLRCK (to MPIO_A) EXTRA DIR FUNCTIONS Error Detection Non-PCM Detection f Calculator Flags DTS-CD/LD Detection Validity Flag User Data Channel Status Data BFRAME Detection Interrupt System S ERROR/INT0 NPCM/INT1 MPIO_A MPIO_B MPIO_C MPO0 MPO1 Function Control DIR (48-Bit) CS DIR (48-Bit) CS DIR P and P C D DIR f Calculator S All Port f Calculator S DIR Interrupt GPIO/GPO Data Register These pins are at default Hi-Z DIX9211 www.ti.com SBAS519 – SEPTEMBER 2010 Default Routing Function (After RESET) The default routing paths are shown in Figure 15 in blue. MPIO_A0-A3 are selected by CLKST, VOUT, XMCKO, and INT0. Note that by default, MPIO_A0-A3 pins are Hi-Z as set by Registers MPA0HZ, MPA1HZ, MPA2HZ, and MPA3HZ. Figure 15. Default Routing Block Diagram By default, the DIR receives data on RXIN2. When the DIR is unlocked, the XTI has priority, and uses the Main port. When the DIR is locked, data from the MAIN PORT are DIR data. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Link(s): DIX9211 |
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