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DIX9211 Datasheet(PDF) 46 Page - Texas Instruments |
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DIX9211 Datasheet(HTML) 46 Page - Texas Instruments |
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46 / 110 page  tM S S LSB (D0) MDI MC MS tMDH tMDS t MS H tMCH tMCL tMCY 1.4V 1.4V 1.4V MDO 0.5*V DD tMD D t MHH t MDR LSB (D0 ) MSB(D7) MSB(R/W) Hi - Z Hi - Z tM DD ADR0 DIX9211 SBAS519 – SEPTEMBER 2010 www.ti.com Timing Requirements Figure 22 shows a detailed timing diagram for the four-wire serial control interface. These timing parameters are critical for proper control port operation. SYMBOL DESCRIPTION MIN MAX UNITS tMCY MC Pulse cycle time 100 ns tMCL MC Low level time 40 ns tMCH MC High level time 40 ns tMHH MS High level time tMCY ns tMSS MS Falling edge to MC rising edge 30 ns tMSH MS Rising edge from MC rising edge for LSB 15 ns tMDH MDI Hold time 15 ns tMDS MDI Set-up time 15 ns tMDD MDO Enable or delay time from MC falling edge 0 30 ns tMDR MDO Disable time from MS rising edge 0 30 ns Figure 22. Control Interface Timing Requirements Two-Wire (I 2C) Serial Control The DIX9211 also supports the I2C serial bus and data transmission protocol. It can be configured for fast mode as a slave device. This protocol is explained fully in the I2C specification 2.1. Slave Address MSB LSB 1 0 0 0 0 ADR1 ADR0 R/W The DIX9211 has seven bits for its own slave address. The first five bits (MSB) of the slave address are factory-preset to '10000'. The next two bits of the address byte are selectable bits that can be set by MDO/ADR0 and MS/ADR1. A maximum of four DIX9211s can be connected on the same bus at one time. Each DIX9211 responds when it receives its own slave address. 46 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): DIX9211 |
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