Electronic Components Datasheet Search
  English  ▼

X  

AM625 Datasheet(PDF) 184 Page - Texas Instruments

Part # AM625
Description  AM62x Sitara™ Processors
PDF  276 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

AM625 Datasheet(HTML) 184 Page - Texas Instruments

Back Button AM625 Datasheet HTML 180Page - Texas Instruments AM625 Datasheet HTML 181Page - Texas Instruments AM625 Datasheet HTML 182Page - Texas Instruments AM625 Datasheet HTML 183Page - Texas Instruments AM625 Datasheet HTML 184Page - Texas Instruments AM625 Datasheet HTML 185Page - Texas Instruments AM625 Datasheet HTML 186Page - Texas Instruments AM625 Datasheet HTML 187Page - Texas Instruments AM625 Datasheet HTML 188Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 184 / 276 page
background image
6.12.5.16.1.3 HS200 Mode
Table 6-87, Figure 6-71, Table 6-88, and Figure 6-72 present both timing requirements and switching
characteristics for MMC0 – HS200 Mode.
Table 6-87. MMC0 Timing Requirements – HS200 Mode
see Figure 6-71
NO.
MIN
MAX
UNIT
HS2004
tDVW
Input data valid window, MMC0_CMD and MMC0_DAT[7:0]
2.0(1)
ns
(1)
This parameter defines the minimum data valid window required by the host, where any data valid window presented to the host
greater than this value ensures the host is able to capture valid data. The value defined by this parameter is smaller than the smallest
possible data valid window defined for any eMMC device operating in HS200 mode.
MMC0_CMD
MMC0_DAT[7:0]
VIH
VIL
Valid
Window
HS2004
Figure 6-71. MMC0 – HS200 – Receive Mode
Table 6-88. MMC0 Switching Characteristics – HS200 Mode
see Figure 6-72
NO.
PARAMETER
MIN
MAX
UNIT
fop(clk)
Operating frequency, MMC0_CLK
200
MHz
HS2005
tc(clk)
Cycle time, MMC0_CLK
5
ns
HS2006
tw(clkH)
Pulse duration, MMC0_CLK high
2.12
ns
HS2007
tw(clkL)
Pulse duration, MMC0_CLK low
2.12
ns
HS2008
td(clkL-cmdV)
Delay time, MMC0_CLK rising edge to MMC0_CMD transition
1.07
3.21
ns
HS2009
td(clkL-dV)
Delay time, MMC0_CLK rising edge to MMC0_DAT[7:0] transition
1.07
3.21
ns
Figure 6-72. MMC0 – HS200 Mode – Transmit Mode
AM625, AM625-Q1, AM623, AM620-Q1
SPRSP58C – JUNE 2022 – REVISED OCTOBER 2025
www.ti.com
184
Submit Document Feedback
Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: AM625 AM625-Q1 AM623 AM620-Q1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com