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ADPL42010ABRCZ Datasheet(PDF) 16 Page - Analog Devices

Part # ADPL42010ABRCZ
Description  20V, 1A, Fast Transient Response LDO Regulator
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADPL42010ABRCZ Datasheet(HTML) 16 Page - Analog Devices

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Data Sheet
ADPL42010A
analog.com
Rev. 0
16 of 28
APPLICATIONS INFORMATION
The ADPL42010A series are 1A low dropout regulators optimized for fast transient response. The devices are capable
of supplying 1A at a dropout voltage of 400mV. The low operating quiescent current (1mA) drops to less than 1µA in
shutdown. In addition to the low quiescent current, the ADPL42010A regulators incorporate several protection
features, which make them ideal for use in battery-powered systems. The devices are protected against both reverse
input and reverse output voltages. In battery backup applications where the output can be held up by a backup
battery when the input is pulled to ground, the ADPL42010A acts as it has a diode in series with its output and
prevents reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a
negative supply, the output can be pulled below ground by as much as 20V and still allow the device to start and
operate.
Adjustable Operation
The adjustable version of the ADPL42010A has an output voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors, as shown in Figure 27. The device serves the output to maintain the voltage at the
ADJ pin at 1.21V referenced to ground. The current in R1 is then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3µA at 25°C, flows through R2 into the ADJ pin. The
output voltage can be calculated using the formula in Figure 27. The value of R1 should be less than 4.17k to minimize
errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown, the output is turned off and
the divider current is zero.
The adjustable device is tested and specified with the ADJ pin connected to the OUT pin for an output voltage of
1.21V. Specifications for output voltages greater than 1.21V are proportional to the ratio of the required output
voltage to 1.21V: VOUT/1.21V. For example, load regulation for an output current change of 1mA to 1A is –3mV typical
at VOUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V) × (–3mV) = –12.4mV
Output Capacitors and Stability
The ADPL42010A regulator is a feedback circuit. Similar to any feedback circuit, frequency compensation is needed
to make it stable. For the ADPL42010A, the frequency compensation is both internal and external due to the output
capacitor. The size of the output capacitor, the type of the output capacitor, and the ESR of the particular output
capacitor all affect the stability.
Figure 27. Adjustable Operation
In addition to stability, the output capacitor also affects the high frequency transient response. The regulator loop
has a finite bandwidth. For the high-frequency transient loads, recovery from a transient is a combination of the
output capacitor and the bandwidth of the regulator. The ADPL42010A is designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency compensation is affected by the output capacitor and
optimum frequency stability may require some ESR, especially with ceramic capacitors.
IN
R2
OUT
VIN
VOUT
R2
R1
VOUT = 1.21V 1 +
+ (IADJ)(R2)
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
ADJ
GND
ADPL42010A
R1
+



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