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PAC1721 Datasheet(PDF) 21 Page - Microchip Technology

Part # PAC1721
Description  Single-Channel Power Monitor with Accumulator, 9V Full Scale Range
PDF  92 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PAC1721 Datasheet(HTML) 21 Page - Microchip Technology

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 2026 Microchip Technology Inc. and its subsidiaries
DS-20007088A-page 21
PAC1721
Equation 4-8 shows how to calculate energy using the
accumulated power and the sample rate (sampling
frequency), ƒS. For this calculation, consider ƒS as
measured in Hz instead of sps.
EQUATION 4-8:
4.8.1
ADAPTIVE ACCUMULATOR
In Adaptive Accumulator (AA) mode, regardless of the
selected ƒS, PAC1721 accumulates samples at the
equivalent rate of 8,192 sps. For example, after the
SLOW pin is pulled high, if PAC1721 begins sampling
at a programmed rate of 8 sps (Slow mode), the
samples taken are shifted to the left by an appropriate
amount and accumulated. This is done to simulate
sampling as if ƒS is set to the maximum of 8,192 sps.
To achieve the simulated sample rate in AA mode, the
accumulator count is also incremented by the
appropriate amount for each sample taken while
PAC1721 operates in Slow mode.
AA mode provides a big reduction in host overhead
and bus traffic for applications that require to:
1.
Use the SLOW pin for low power operation
during specific times
2.
Have continuous accurate energy monitoring for
both the maximum and Slow sample rates
As shown in Equation 4-7 and Equation 4-8, it is
necessary to know the sample rate (ƒS) and sampling
period (tS) for each interval during which energy is
accumulated. If the SLOW pin is pulled high and tS
changes, the host must read accumulator data and
determine the accumulator value and accumulator
count every time ƒS changes. While operating in AA
mode, the host needs to read accumulator data only
once, just before the accumulator and/or accumulator
count overflows. Using AA mode, PAC1721 accurately
calculates the accumulated energy, independent of
how many times the SLOW pin was pulled high and
low during tS.
The SLOW register offers a variety of options to
monitor when the SLOW pin transitions or when the
Slow function is active. This includes issuing Refresh
(any) and Limited Refresh commands. This behavior
is controlled by setting the appropriate bits in the
SLOW register. For more details, see Register 6-23.
While AA mode is enabled, if ƒS is configured to any
other value than 8,192 sps, registers VACC and
ACC_COUNT shift the accumulator data and count to
mimic sample accumulation at the maximum sampling
rate of 8,192 sps. Adaptive Accumulator mode is
enabled by setting the AA bit in the CONTROL register
to 1b. For more details, see Register 6-2.
4.8.2
ADDITIONAL ACCUMULATOR
INFORMATION
Power calculation and accumulation inside PAC1721
are always done using 2's complement, regardless of
what the output registers are set to show. Internally,
VBUS and VSENSE are 12-bit 2's complement signed
numbers. VPOWER is calculated by multiplying VSENSE
and VBUS, resulting in a 24-bit 2's complement signed
number. In some cases, while the 24-bit VPOWER result
is not identical to the product of the VBUS register
multiplied by the VSENSE register, the VPOWER result
is more accurate.
The FSR for VBUS or VSENSE measurements is set in
the NEG_PWR_FSR register using the CFG_VB[1:0]
and CFG_VS[1:0] bits. For details, see Register 6-20.
If FSR for both VSENSE and VBUS measurements is set
to unipolar mode, these measurements are stored in
the VBUS and VSENSE registers as 12-bit unsigned
numbers.
If FSR for VBUS and VSENSE sampling is set to bipolar
mode, the measurement results are stored in the VBUS
and the VSENSE registers as 12-bit 2’s complement
signed numbers.
However, VPOWER calculations use 12-bit 2's comple-
ment signed values. Therefore, a mismatch is possible
between an externally calculated power value (where
VPOWER = VBUS × VSENSE) and the actual power value
determined by PAC1721. This internal value is more
accurate than the externally calculated power. This
also applies to FSR/2 modes that use bit shifting to
change the FSR. Therefore, accuracy is not lost during
power calculations (similar to unipolar mode).
Continuous power integration periods, also called
energy accumulation periods, range from ~ 1 ms to
several hours, depending on the programmed ƒS. The
total number of samples is limited by the size of the
ACC_COUNT register to 4,294,967,296 or 232. The
count corresponds to about 1,165 hours at 1,024 sps or
approximately 17 years at 8 sps.
Where:
E = Energy (J)
CONV(VACC) = Converted digital value, from
hexadecimal to decimal, read from
the VACC register
224 = VPOWER Register Size (bits)
FSRP = Full Scale Range for Power (W)
fS = Sample Rate (Hz)
E
CONV VACC

2
24
--------------------------------------
FSRP
fS
--------------
=



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