PAC1721 datasheet(61/92 Pages) MICROCHIP

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DS-20007088A-page 61

PAC1721

SLOW (ADDRESS 16H)

R-0

R/W-0

U-0

SLOW

SLOW_LH

SLOW_HL

R_RISE

R_V_RISE

R_FALL

R_V_FALL

–

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as 0

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

X = Bit is unknown

This register tracks the state of the SLOW pin and transitions that occur on this pin.

It also controls the type of Limited refresh commands (if any) that occur on SLOW pin transitions. This enables the

monitoring of the SLOW pin state and its transitions over I2C, even though the SLOW pin is asynchronous to the I2C

pins (SDA and SCL) and can have a different I2C Controller.

Values newly written to the register are activate only after sending a Refresh (any) command.

On a SLOW pin transition, a Limited Refresh command can be executed if bits R_V_FALL, R_FALL, R_V_RISE and

R_RISE are set to 1b.

These Limited Refresh and Refresh_V commands update all of the readable results registers.

The Limited Refresh command also resets the accumulators and accumulator count. These are called Limited Refresh

and Limited Refresh_V commands because there is no activation of any pending changes to configuration registers.

Note:

If a Limited Refresh and Limited Refresh_V command are both enabled for a specific SLOW pin transition,

only the Refresh command is executed. Refresh overrides Refresh_V.

bit 7

SLOW: Check the status of the SLOW pin.

0b = SLOW pin pulled low.

1b = SLOW pin pulled high.

bit 6

SLOW_LH: Tracks if the SLOW pin transitioned from low to high since the last Refresh (any) command.

The bit is reset to 0 by a Refresh or Refresh_G command.

0b = SLOW pin did not transition from low to high since the last Refresh (any) command.

1b = SLOW pin transitioned from low to high since the last Refresh (any) command.

bit 5

SLOW_HL: Tracks if the SLOW pin transitioned from high to low since the last Refresh (any) command.

The bit is reset to 0 by a Refresh or Refresh_G command.

0b = SLOW pin did not transition from high to low since the last Refresh (any) command.

1b = SLOW pin transitioned from high to low since the last Refresh (any) command.

bit 4

R_RISE: Configure if a Limited Refresh command is executed on the rising edge of the SLOW pin.

The bit is not reset automatically. Write to the bit to change its value.

0b = Disallows Limited Refresh commands to execute on the rising edge of the SLOW pin. (default)

1b = Allows Limited Refresh commands to execute on the rising edge of the SLOW pin.

bit 3

R_V_RISE: Configure if a Limited Refresh_V command is executed on the rising edge of the SLOW

pin. The bit is not reset automatically. Write to the bit to change its value.

0b = Disallows Limited Refresh_V commands to execute on the rising edge of the SLOW pin. (default)

1b = Allows Limited Refresh_V commands to execute on the rising edge of the SLOW pin.

bit 2

R_FALL: Configure if a Limited Refresh command is executed on the falling edge of the SLOW pin.

The bit is not reset automatically. Write to the bit to change its value.

0b = Disallows Limited Refresh commands to execute on the falling edge of the SLOW pin. (default)

1b = Allows Limited Refresh commands to execute on the falling edge of the SLOW pin.

PAC1721 Datasheet(PDF) 61 Page - Microchip Technology

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